PCA8530DUGSLASHDAZ datasheet(29/103 Pages) NXP

29 / 103 page

PCA8530

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Product data sheet

Rev. 2 — 25 September 2014

29 of 103

NXP Semiconductors

PCA8530

Automotive 102 x 4 Chip-On-Glass LCD segment driver

8.8.3 Recommended power-down sequences

General remarks:

1. It is necessary to run the power-down sequence before removing the supplies.

Depending on the application, care must be taken that no other signals are present at

the chip input or output pins when removing the supplies (refer to Section 10 on

page 63). Otherwise this may cause unwanted display artifacts. Uncontrolled removal

of supply voltages does not damage the PCA8530.

2. Static voltages across the liquid crystal display can build up when the external LCD

supply voltage (VLCD) is on while the IC supply voltage (VDD1 to VDD3) is off, or the

other way round. This may cause unwanted display artifacts. To avoid such artifacts,

external VLCD, VDD1 to VDD3 must be applied or removed together.

3. A clock signal must always be supplied to the device when the device is active.

Removing the clock may freeze the LCD in a DC state, which is not suitable for the

liquid crystal. It is recommended to disable the display first and to remove the clock

signal afterwards.

With the following sequences, the PCA8530 can be set to a state of minimum power

consumption, called power-down mode.

(1) If previously enabled.

Remark: When bits DE (Table 22 on page 21), CPE (Table 14 on page 15) and TME (Table 17 on

page 17) are logic 0, the internal clock signal is switched off.

Fig 7.

Recommended power-down sequence for minimum power-down current when

using the internal charge pump and the internal clock signal

PCA8530DUG/DAZ Datasheet(PDF) 29 Page - NXP Semiconductors