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5015 Datasheet(PDF) 3 Page - Analog Devices |
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5015 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 5 page ![]() User Guide EVAL-ADL8142 OPERATING THE ADL8142-EVALZ analog.com Rev. 0 | 3 of 5 A 2 V, 100 mA power supply is required to provide the bias to the ADL8142 when using the ADL8142-EVALZ. Connect the 2 V power supply to the SMT test point, VDD. Connect the ground reference to the GND test point. Apply the RF power after VDD has been turned on and remove the RF power before VDD is turned off. Refer to the ADL8142 data sheet for the recommended resistor values to achieve different supply currents. The following bias conditions are recommended to achieve optimal performance: VDD = 2 V and quiescent current (IDQ) = 25 mA. IDQ is typically achieved using a 634 Ω value for the bias resistance (RBIAS). Figure 3. Insertion Loss and Return Loss of the Through Calibration Path, 23 GHz to 31 GHz Table 1. Insertion Loss and Return Loss of the Through Calibration Path Frequency (GHz) Insertion Loss (dB) Input Return Loss (dB) Output Return Loss (dB) 23 −0.908 −24.304 −35.554 23.5 −0.959 −19.365 −21.21 24 −1.111 −14.038 −14.799 24.5 −1.299 −11.303 −11.85 25 −1.461 −9.793 −10.294 25.5 −1.537 −9.301 −9.71 26 −1.519 −9.532 −9.931 26.5 −1.438 −10.699 −11.062 27 −1.293 −12.907 −13.664 27.5 −1.177 −17.255 −19.039 28 −1.137 −21.744 −35.417 28.5 -1.235 −16.089 −17.334 29 −1.453 −11.593 −12.081 29.5 −1.705 −9.217 −9.417 30 −1.92 −7.958 −8.139 30.5 −1.993 −7.623 −7.823 31 −1.941 −8.134 −8.333 RECOMMENDED BIAS SEQUENCING During Power-Up To power up the ADL8142-EVALZ, take the following bias sequenc- ing steps: 1. Connect the VDD power supply. 2. Set the VDD supply to 2 V. 3. Apply the RF input signal. During Power-Down To power down the ADL8142-EVALZ, take the following bias se- quencing steps: 1. Turn off the RF input signal. 2. Set the VDD supply to 0 V. |
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