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LTC4215CUFD Datasheet(PDF) 4 Page - Linear Technology |
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LTC4215CUFD Datasheet(HTML) 4 Page - Linear Technology |
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4 / 28 page  LTC4215/LTC4215-2 4 4215fe ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Comparator Inputs VON(TH) ON Pin Threshold Voltage VON Rising l 1.210 1.235 1.26 V ΔVON(HYST) ON Pin Hysteresis l 60 128 180 mV ION(IN) ON Pin Input Current VON = 1.2V l 0 ±1 μA VEN(TH) EN Input Threshold VEN = Rising l 1.215 1.235 1.255 V ΔVEN(HYST) EN Hysteresis l 50 128 200 mV IEN EN Pin Input Current EN = 3.5V l 0 ±1 μA VOV(TH) OV Pin Threshold Voltage VOV Rising l 1.215 1.235 1.255 V ΔVOV(HYST) OV Pin Hysteresis l 10 30 40 mV IOV(IN) OV Pin Input Current VOV = 1.8V l 0 ±1 μA VUV(TH) UV Pin Threshold Voltage VUV Rising l 1.215 1.235 1.255 V ΔVUV(HYST) UV Pin Hysteresis l 60 80 100 mV IUV(IN) UV Pin Input Current VUV = 1.8V l 0 ±1 μA VUV(RTH) UV Pin Reset Threshold Voltage VUV Falling l 0.33 0.4 0.47 V ΔVUV(RHYST) UV Pin Reset Threshold Hysteresis l 60 125 210 mV VFB Foldback Pin Power Good Threshold FB Rising l 1.215 1.235 1.255 V ΔVFB(HYST) FB Pin Power Good Hysteresis l 38 15 mV IFB Foldback Pin Input Current FB = 1.8V l 0 ±1 μA VGPIO(TH) GPIO Pin Input Threshold VGPIO Rising l 0.8 1 1.2 V Other Pin Functions VGPIO(OL) GPIO Pin Output Low Voltage IGPIO = 5mA l 0.25 0.5 V IGPIO(OH) GPIO Pin Input Leakage Current VGPIO = 15V l 0 ±1 μA ISOURCE SOURCE Pin Input Current SOURCE = 15V l 40 80 120 μA tP(GATE) Input (ON, OV, UV, EN) to GATE Off Propagation Delay l 35 μs tD(GATE) Turn-On Delay ON UV, OV, EN Overcurrent Auto-Retry l l l 50 2.5 1 100 5 2 150 75 μs ms s VTIMERL(TH) Timer Low Threshold l 0.17 0.2 0.23 V VTIMERH(TH) Timer High Threshold l 1.2 1.235 1.26 V ITIMER(UP) TIMER Pin Pull-Up Current l –80 –100 –120 μA ITIMER(DOWN) TIMER Pin Pulldown Current for OC Auto-Retry l 1.4 2 2.6 μA ITIMER(UP/DOWN) TIMER Current Up/Down Ratio l 40 50 60 ISS Soft-Start Ramp Pull-Up Current Ramping Waiting for GATE to Slew l l –7.5 –0.4 –10 –0.7 –12.5 –1.0 μA μA ADC RES Resolution (No Missing Codes) l 8 Bits INL Integral Nonlinearity VDD – SENSE (Note 5) SOURCE ADIN l l l –2 –1.25 –1.25 0.5 0.2 0.2 2 1.25 1.25 LSB LSB LSB VOS Offset Error (Note 4) VDD – SENSE SOURCE ADIN l l l ±2.0 ±1.0 ±1.0 LSB LSB LSB |
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