HT49C70L datasheet(13/42 Pages) HOLTEK

13 / 42 page

HT49R70A-1/HT49C70-1/HT49C70L

Rev. 2.00

April 24, 2006

clock interrupt bit (ERTI), and enable time base interrupt

bit (ETBI), enable Timer/Event Counter 1 interrupt bit

(ET1I) on the other hand, constitute the Interrupt Control

EMI, EEI0, EEI1, ET0I, ET1I, ETBI, and ERTI are all

used to control the enable/disable status of interrupts.

These bits prevent the requested interrupt from being

serviced. Once the interrupt request flags (RTF, TBF,

T0F, T1F, EIF1, EIF0) are all set, they remain in the

INTC1 or INTC0 respectively until the interrupts are ser-

viced or cleared by a software instruction.

It is recommended that a program should not use the

²CALL subroutine² within the interrupt subroutine. It¢sbe-

cause interrupts often occur in an unpredictable manner

or require to be serviced immediately in some applica-

tions. During that period, if only one stack is left, and en-

abling the interrupt is not well controlled, operation of the

²call² in the interrupt subroutine may damage the origi-

nal control sequence.

Oscillator Configuration

These devices provide three oscillator circuits for sys-

tem clocks, i.e., RC oscillator, crystal oscillator and

32768Hz crystal oscillator, determined by options. No

matter what type of oscillator is selected, the signal is

used for the system clock. The HALT mode stops the

system oscillator (RC and crystal oscillator only) and ig-

nores external signal in order to conserve power. The

32768Hz crystal oscillator (system oscillator) still runs at

HALT mode. If the 32768Hz crystal oscillator is selected

as the system oscillator, the system oscillator is not

stopped; but the instruction execution is stopped. Since

the system oscillator or oscillator) is also designed for

timing purposes, the internal timing (RTC, time base,

WDT) operation still runs even if the system enters the

HALT mode.

Of the three oscillators, if the RC oscillator is used, an

external resistor between OSC1 and VSS is required,

and the range of the resistance should be from 24k

W to

W for HT49R70A-1/HT49C70-1 and from 560kW to

W for HT49C70L. The system clock, divided by 4, is

available on OSC2 with pull-high resistor, which can be

used to synchronize external logic. The RC oscillator

provides the most cost effective solution. However, the

frequency of the oscillation may vary with VDD, temper-

ature, and the chip itself due to process variations. It is

therefore, not suitable for timing sensitive operations

where accurate oscillator frequency is desired.

On the other hand, if the crystal oscillator is selected, a

crystal across OSC1 and OSC2 is needed to provide the

feedback and phase shift required for the oscillator, and

no other external components are required. A resonator

may be connected between OSC1 and OSC2 to replace

the crystal and to get a frequency reference, but two ex-

ternal capacitors in OSC1 and OSC2 are required.

There is another oscillator circuit designed for the real

time clock. In this case, only the 32.768kHz crystal oscil-

lator can be applied. The crystal should be connected

between OSC3 and OSC4.

The RTC oscillator circuit can be controlled to oscillate

quickly by setting the

²QOSC² bit (bit 4 of RTCC). It is

recommended to turn on the quick oscillating function

upon power on, and then turn it off after 2 seconds.

The WDT oscillator is a free running on-chip RC oscilla-

tor, and no external components are required. Although

the system enters the power down mode, the system

clock stops, and the WDT oscillator still works with a pe-

riod of approximately 65

ms at 5V. The WDT oscillator

can be disabled by options to conserve power.

Watchdog Timer

- WDT

The WDT clock source is implemented by a dedicated

RC oscillator (WDT oscillator) or an instruction clock

(system clock/4) or a real time clock oscillator (RTC os-

cillator). The timer is designed to prevent a software

malfunction or sequence from jumping to an unknown

location with unpredictable results. The WDT can be

disabled by options. But if the WDT is disabled, all exe-

cutions related to the WDT lead to no operation.

The WDT time-out period is fS/2

15~f

S/2

16.

If the WDT clock source chooses the internal WDT oscil-

lator, the time-out period may vary with temperature,

VDD, and process variations. On the other hand, if the

clock source selects the instruction clock and the

²HALT² instruction is executed, WDT may stop counting

and lose its protecting purpose, and the logic can only

be restarted by an external logic.

C r y s t a l O s c i l l a t o r

R C O s c i l l a t o r

O S C 1

O S C 2

f S Y S / 4

O S C 2

V D D

3 2 7 6 8 H z C r y s t a l /

R T C O s c i l l a t o r

V D D

4 7 0 p F

O S C 3

O S C 4

System Oscillator

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