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PI6CB184Q Datasheet(PDF) 3 Page - Diodes Incorporated |
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PI6CB184Q Datasheet(HTML) 3 Page - Diodes Incorporated |
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3 / 17 page ![]() 3 A Product Line of Diodes Incorporated PI6CB184Q www.diodes.com September 2022 Diodes Incorporated PI6CB184Q Document Number DS41705 Rev 4-2 Pin Number Pin Name Type Description 14 Q0- Output HCSL Differential complementary clock output 15, 26, 30 GND Power Ground 16, 25 VDDO Power Power supply for differential outputs 17 OE1# Input CMOS Active low input for enabling Q1 pair. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 18 Q1+ Output HCSL Differential true clock output 19 Q1- Output HCSL Differential complementary clock output 20 GNDA Power Ground for analog circuitry 21 VDDA Power Power supply for analog circuitry 22 Q2+ Output HCSL Differential true clock output 23 Q2- Output HCSL Differential complementary clock output 24 OE2# Input CMOS Active low input for enabling Q2 pair. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 27 Q3+ Output HCSL Differential true clock output 28 Q3- Output HCSL Differential complementary clock output 29 OE3# Input CMOS Active low input for enabling Q3 pair. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 31 PD# Input CMOS Input notifies device to sample latched inputs and start up on first high assertion. Low enters Power Down Mode, subsequent high assertions exit Power Down Mode. This pin has internal pull-up resistor. 32 SADR_TRI Input Tri-level Latch to select SMBus Address. This pin has an internal pull-down Pin Description Cont. |
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