Preliminary data

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

June 2010

Doc ID 17663 Rev 1

1/9

9

STL100N3LLH7

N-channel 30 V, 0.0025

Ω, 25 A PowerFLAT™ (5x6)

STripFET™ VII DeepGATE™ Power MOSFET

Features

■ RDS(on) * Qg industry benchmark

■ Extremely low on-resistance RDS(on)

■ High avalanche ruggedness

Application

■ Switching applications

Description

This device utilizes the 7th generation of design

rules of ST’s proprietary STripFET™ technology,

with a new gate structure. The resulting Power

MOSFET exhibits the lowest RDS(on) in all

packages.

Figure 1.

Internal schematic diagram

Type

VDSS

RDS(on)

max

ID

STL100N3LLH7

30 V

0.0035

Ω

25 A (1)

1.

The value is rated according Rthj-pcb

PowerFLAT™ ( 5x6 )

Table 1.

Device summary

Order code

Marking

Package

Packaging

STL100N3LLH7

100N3LLH7

PowerFLAT™ (5x6)

Tape and reel

www.st.com