HI-IF Single-Chip Broadband Tuners

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13

BIT ID

BIT NAME

BIT LOCATION (0 = LSB)

FUNCTION

XX

7, 6

Reserved

F

HI-IF Filter Control

5, 4

HI-IF Filter Control:

• 00 = Step down 5MHz

• 01 = Nominal

• 11 = Step up 5MHz

MUX

Lock-Detect and MUX

Output Control

3–0

Lock-Detect and MUX Output Control:

• 0000 = Normal, low-noise operation

• 0001 = Lock detect for the 1st VCO

• 0010 = Lock detect for the 2nd VCO

• 0011 = 1st VCO N-divider

• 0100 = 1st VCO R-divider

• 0101 = 2nd VCO N-divider

• 0110 = 2nd VCO R-divider

• 0111 = Reference oscillator

• 1000 = AND output of lock detector

• 1001 = NAND output of lock detector

Table 11. HI-IF Step Control and MUX Output Register (HI-IF)

MSB

LSB

8 DATA BITS

REGISTER

NUMBER

REGISTER

NAME

D7

D6

D5

D4

D3

D2

DB1

D0

1

LD_POR

LOCK1

LOCK2

POR

OU1

OU2

X

X

X

Table 12. Read Mode Register Configuration

BIT ID

BIT NAME

BIT LOCATION

(0 = LSB)

FUNCTION

LOCK1

LOCK1

7

Lock indicator for 1st VCO (see Table 15)

LOCK2

LOCK2

6

Lock indicator for 2nd VCO

POR

POR

5

Power-on reset indicator; 1 indicates successful power-on reset

OU1

OU1

4

OU2

OU2

3

XX

2, 1, 0

Reserved

Table 14. Lock Detect and POR Register

REGISTER NUMBER

REGISTER NAME

FUNCTION

1

LD_POR

Lock detect and power-on reset

Table 13. Read Mode Register Description

LOCK1

OU1

DESCRIPTION

1x

1st VCO locked

00

(Under) Choose next lower tank

01

(Over) Choose next higher tank

Table 15. 1st VCO Truth Table