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LPC43S20 Datasheet(PDF) 1 Page - NXP Semiconductors

Part # LPC43S20
Description  32-bit ARM Cortex-M4/M0 flashless MCU with security features; up to 264 kB SRAM, Ethernet; two HS USBs, AES engine, LCD, EMC, SPIFI
PDF  156 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC43S20 Datasheet(HTML) 1 Page - NXP Semiconductors

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1. General description
The LPC43S50/S30/S20 are ARM Cortex-M4 based microcontrollers for embedded
applications which include an ARM Cortex-M0 coprocessor, up to 264 kB of SRAM,
security features with AES engine, advanced configurable peripherals such as the State
Configurable Timer/PWM (SCTimer/PWM) and the Serial General-Purpose I/O (SGPIO)
interface, two High-speed USB controllers, Ethernet, LCD, an external memory controller,
and multiple digital and analog peripherals. The LPC43S50/S30/S20 operate at CPU
frequencies of up to 204 MHz.
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level of support block integration. The
ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals, and
includes an internal prefetch unit that supports speculative branching. The ARM
Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A
hardware floating-point unit is integrated in the core.
The ARM Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which
is code- and tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor offers
up to 204 MHz performance with a simple instruction set and reduced code size. In
LPC43Sx0, the Cortex-M0 coprocessor hardware multiply is implemented as a 32-cycle
iterative multiplier.
See Section 17 “References” for additional documentation.
2. Features and benefits
Cortex-M4 Processor core
ARM Cortex-M4 processor, running at frequencies of up to 204 MHz.
Built-in Memory Protection Unit (MPU) supporting eight regions.
Built-in Nested Vectored Interrupt Controller (NVIC).
Hardware floating-point unit.
Non-maskable Interrupt (NMI) input.
JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch
points.
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
System tick timer.
LPC43S50/S30/S20
32-bit ARM Cortex-M4/M0 flashless MCU with security
features; up to 264 kB SRAM, Ethernet; two HS USBs, AES
engine, LCD, EMC, SPIFI
Rev. 1.3 — 20 January 2020
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