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ADM1068

Preliminary Technical Data

Rev. PrB | Page 16 of 28

SEQUENCING ENGINE APPLICATION EXAMPLE

The application in this section demonstrates the operation of

the SE. Figure 20 shows how the simple building block of a

single SE state can be used to build a power-up sequence for a

3-supply system.

Table 7 lists the PDO outputs for each state in the same SE

implementation. In this system, the presence of a good 5 V supply

on VP1 and the VX1 pin held low are the triggers required for a

power-up sequence to start. The sequence intends to turn on

the 3.3 V supply next, then the 2.5 V supply (assuming successful

turn-on of the 3.3 V supply). Once all three supplies are good,

the PWRGD state is entered, where the SE remains until a fault

occurs on one of the three supplies, or it is instructed to go

through a power-down sequence by VX1 going high.

Faults are dealt with throughout the power-up sequence on a

case-by-case basis. The following sections, which describe the

individual blocks, use this sample application to demonstrate

the state machine’s actions.

IDLE1

IDLE2

EN3V3

DIS3V3

DIS2V5

PWRGD

FSEL1

FSEL2

SEQUENCE

STATES

MONITOR FAULT

STATES

TIMEOUT

STATES

VX1 = 0

VP1 = 1

VP1 = 0

(VP1 + VP2) = 0

(VP1 + VP2 + VP3) = 0

(VP1 +

VP2) = 0

VP2 = 1

VP3 = 1

VP2 = 0

VX1 = 1

VP3 = 0

VP2 = 0

VP1 = 0

VX1 = 1

10ms

20ms

EN2V5

Figure 20. Sample Application Flow Diagram

Table 7. PDO Outputs for Each State

PDO Outputs

IDLE1

IDLE2

EN3V3

EN2V5

DIS3V3

DIS2V5

PWRGD

FSEL1

FSEL2

PDO1 = 3V3ON

PDO2 = 2V5ON

PDO3 = FAULT

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