6.7 Electrical Characteristics (continued)

over TA = 25°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

DEVICE

MIN

TYP

MAX

UNIT

VCLAMP

Clamping voltage(3)

IPP = 16 A, TLP, IO to GND and GND to IO

ESD1LIN24-Q1

40

V

ESD751-Q1

41.5

ESD761-Q1

42.5

V

ILEAK

Leakage current

VIO = ±24 V, IO to GND

-50

1

50

nA

RDYN

Dynamic resistance(3)

ESD1LIN24-Q1

0.5

Ω

ESD751-Q1

0.6

ESD761-Q1

0.53

CL

Line capacitance

VIO = 0 V, f = 1 MHz, Vpp = 30 mV, IO to

GND

ESD1LIN24-Q1

2.3

3.8

pF

ESD751-Q1

1.6

2.7

ESD761-Q1

1.1

1.8

(1)

VBRF and VBRR are defined as the voltage when ±10 mA is applied in the positive-going direction, before the device latches into the

snapback state.

(2)

Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5.

(3)

Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008

ESD1LIN24-Q1, ESD751-Q1, ESD761-Q1

SLVSGS4C – SEPTEMBER 2022 – REVISED DECEMBER 2022

www.ti.com

6

Submit Document Feedback

Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: ESD1LIN24-Q1 ESD751-Q1 ESD761-Q1