APW7065 datasheet(13/19 Pages) ANPEC

13 / 19 page

Rev. A.1 - Feb., 2006

APW7065

www.anpec.com.tw

to factor in the temperature dependency of the R

DS(ON)

and can be extracted from the “R

DS(ON) vs Temperature”

curve of the power MOSFET.

PWM Compensation

The output LC filter of a step down converter introduces

a double pole, which contributes with -40dB/decade

gain slope and 180 degrees phase shift in the control

loop. A compensation network among COMP, FB and

OUT should be added. The compensation network is

shown in Fig. 6. The output LC filter consists of the

output inductor and output capacitors. The transfer

function of the LC filter is given by:

Application Information (Cont.)

MOSFET Selection (Cont.)

The poles and zero of this transfer functions are:

OUT

ESR

The F

LC is the double poles of the LC filter, and FESR is

the zero introduced by the ESR of the output capacitor.

PHASE

OUTPUT

COUT

ESR

Figure 3. The Output LC Filter

FLC

FESR

-40dB/dec

-20dB/dec

Frequency(Hz)

The PWM modulator is shown in Figure 5. The input

is the output of the error amplifier and the output is the

PHASE node. The transfer function of the PWM

modulator is given by:

Figure 5. The PWM Modulator

Output of

Error Amplifier

ΔVOSC

PWM

Comparator

Driver

PHASE

VIN

OSC

The compensation network is shown in Figure 6. It

provides a close loop transfer function with the highest

zero crossover frequency and sufficient phase margin.

The transfer function of error amplifier is given by:

























sC3

R1//

sC2

sC1

GAIN

OUT

COMP

AMP

OSC

PWM

GAIN

∆

ESR

GAIN

OUT

Figure 4. The LC Filter GAIN and Frequency

(

)













































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