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AP61301 Datasheet(PDF) 14 Page - Diodes Incorporated |
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AP61301 Datasheet(HTML) 14 Page - Diodes Incorporated |
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14 / 21 page ![]() AP61300/AP61302 Document number: DS43404 Rev. 3 - 2 14 of 21 www.diodes.com November 2022 © 2022 Copyright Diodes Incorporated. All Rights Reserved. AP61300/AP61302 Application Information (continued) 3 Enable When disabled, the device shutdown supply current is only 0.1 μA. When applying a voltage greater than the EN logic high threshold (typical 0.91V, rising), the AP61300/AP61302 enables all functions and the device initiates the soft-start phase. The AP61300/AP61302 has a built-in 0.5ms soft- start time to prevent output voltage overshoot and inrush current. When the EN voltage falls below its logic low threshold (typical 0.83V, falling), the internal SS voltage discharges to ground and device operation disables. The device operates in PFM when a logic high voltage is applied to the EN pin greater than VIN – 200mV. Tying the EN pin to the VIN pin is sufficient to achieve this threshold condition. The device operates in PWM regardless of output load when a logic high voltage is applied to the EN pin less than VIN – 200mV. Using an external resistive divider to create a difference in voltage between the VIN and EN pins is sufficient to achieve this threshold condition. AP61302 VIN EN SW FB GND INPUT R1 200kΩ R2 100kΩ C2 22µF C1 22µF OUTPUT VOUT 1.8V PG L 1μH C3 33pF R3 100kΩ R4 200kΩ Figure 41. Example Application Circuit for Forced PWM Operation 4 Power-Good (PG) Indicator (AP61302) The PG pin of AP61302 is an open-drain output that is actively held low during the soft-start period until the output voltage reaches 95% of its target value. When the output voltage is outside of its regulation by ±10%, PG pulls low until the output returns within 5% of its set value. The PG rising edge transition is delayed by 40 μs. The PG pin is connected to VIN through an internal 5MΩ pull-up resistor. 5 Undervoltage Lockout (UVLO) and Input Overvoltage Protection (OVP) Undervoltage lockout is implemented to protect the IC from insufficient input voltages. The AP61300/AP61302 disables if the input voltage falls below 2.2V. In this UVLO event, both the high-side and low-side power MOSFETs turn off and the 125 Ω active discharge enables to discharge the output voltage to ground. Similarly, input overvoltage protection is implemented to protect the IC from excess input voltages. The AP61300/AP61302 disables if the input voltage rises above 6.3V. In this OVP event, both the high-side and low-side power MOSFETs turn off and the 125 Ω active discharge enables to discharge the output voltage to ground. |
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