LTM8065 datasheet(12/28 Pages) AD

12 / 28 page

LTM8080

Rev. 0

For more information www.analog.com

VBUS (Bank 1): Output of the switching regulator and the

inputs of LDOs. VBUS = 2.5V or (VOUT1 + 1V), whichever

is higher. VBUS may deliver current based on the following

formula: IBUS(MAX) = 1.5 – (IOUT1 + IOUT2), in amperes.

Add more capacitors to these pins when necessary; see

Table 1 for recommended values.

GND (Bank 2, Pins A1, A6): Tie these GND pins to a

local ground plane below the LTM8080 and the circuit

components. In most applications, the bulk of the heat

flow out of the LTM8080 is through these pads, so the

printed circuit design has a large impact on the thermal

performance of the part. See the PCB Layout sections for

more details.

VOUTn (Bank 3, Bank 5): Power Output Pins. These pins

supply power to the load. For stability, use a minimum

10µF output capacitor with an ESR below 20mΩ and an

ESL below 2nH. Large load transients require larger out-

put capacitance to limit peak voltage transients. Refer to

the Applications Information section for more information

on output capacitance. The VOUT2 voltage must be equal

to or less than the VOUT1 voltage.

VIN (Bank 4): VIN supplies current to the LTM8080’s inter-

nal regulator and to the internal power switches. These

pins must be locally bypassed with an external, low ESR

capacitor; see Table 1 for recommended values.

SS (Pin A2): The SS pin is used to provide a soft-start

from the switching regulator. The internal 2μA pull-up

current, in combination with an external capacitor tied

to this pin, creates a voltage ramp. The soft-start ramp

time is approximated by the equation t = 0.39 • C where

C is in μF. This pin is pulled to the ground with an inter-

nal MOSFET during shutdown and fault conditions; use

a series resistor if driving from a low impedance output.

This pin may be left floating.

RUN (Pin A3): Pull the RUN pin below 0.9V to shut

down the LTM8080. Tie to 1.2V or above for normal

operation. If the shutdown feature is not used, tie this

pin to the VIN pin.

SYNC (Pin B6): External clock synchronization input and

operational mode. This pin programs four different oper-

ating modes:

1. Burst Mode® Operation. Tie this pin to the ground for

Burst Mode operation at low output loads, resulting in

an ultralow quiescent current.

2. Pulse-skipping mode. Float this pin for pulse-skipping

mode. This mode offers full-frequency operation down

to low output loads before pulse skipping occurs.

3. Spread spectrum mode. Tie this pin high (between 2.9V

and 4.2V) for pulse-skipping mode with spread spec-

trum modulation.

4. Synchronization mode. Drive this pin with a clock

source to synchronize to an external frequency.

During synchronization, the part will operate in

pulse-skipping mode.

RT (Pin C6): Use the RT pin to program the switching fre-

quency of the LTM8080 by connecting a resistor from this

pin to the ground. See Table 2 to determine the resistance

value based on the desired switching frequency. Minimize

capacitance at this pin. Do not drive this pin.

PGn (Pins G2, G5): Power Good. PG is an open-col-

lector flag that indicates output voltage regulation. PG

pulls low if PGFB is below 300mV. If the power good

functionality is not needed, float the PG pin. A parasitic

substrate diode exists between PG and GND pins; do

not drive PG more than 0.3V below GND during regular

operation or a fault condition.

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

PIN FUNCTIONS

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