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24LLC16 Datasheet(PDF) 7 Page - Ceramate Technical |
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24LLC16 Datasheet(HTML) 7 Page - Ceramate Technical |
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7 / 22 page ![]() 24LLC16 16K-Bit-Serial EEPROM * All specs and applications shown above subject to change without prior notice. 1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN Email: server@ceramate.com.tw Tel:886-3-3214525 Http: www.ceramate.com.tw Fax:886-3-3521052 Page 7 of 22 Rev 1.0 Aug.5, 2002 Master SCL Line Data from Transmitter ACK ACK from Receiver Bit 9 Bit 1 Figure 5-8. Acknowledge Response From Receiver • Slave Address: After the master initiates a start condition, it must output the address of the device to be accessed. The most significant four bits of the slave address are called the “device identifier.” The identifier for the 24LLC16 is “1010B”. The next three bits (B2, B1, B0) are for block selection. They are used by the master to select which of the blocks of internal memory (1 block=256 words) are to be accessed. (see Table 5-2 below.) These bits are in effect the three most significant bits of the word address • Read/Write: The final (eighth) bit of the slave address defines the type of operation to be performed. If the R/W bit is “1”, a read operation is executed. If it is “0”, a write operation is executed. Table 5-2. Slave Address Byte Function Device Identifier Block Select R/W Bit b7 b6 b5 b4 b3 b2 b1 b0 Read 1 0 1 0 B2 B1 B0 1 Write 1 0 1 0 B2 B1 B0 0 |
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