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24LLC16T Datasheet(PDF) 12 Page - Ceramate Technical |
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24LLC16T Datasheet(HTML) 12 Page - Ceramate Technical |
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12 / 22 page ![]() 24LLC16 16K-Bit-Serial EEPROM * All specs and applications shown above subject to change without prior notice. 1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN Email: server@ceramate.com.tw Tel:886-3-3214525 Http: www.ceramate.com.tw Fax:886-3-3521052 Page 12 of 22 Rev 1.0 Aug.5, 2002 RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the slave address with the R/W bit set to “1”, the master must first perform a “dummy” write operation. This operation is performed in the following steps: 1. The master first issues a start condition, the slave address, and the word address to be read. (This step sets the internal word address pointer of the 24LLC16 to the desired address.) 2. When the master receives an ACK for the word address, it immediately re-issues a start condition followed by another slave address, with the R/W bit set to “1”. 3. The 24LLC16 then sends an ACK and the 8-bit data stored at the pointed address. 4. At this point, the master does not acknowledge the transmission, generating a stop condition. 5. The 24LLC16 stops transmitting data and reverts to stand-by mode (see Figure 5-13). Word Address Slave Address Start A C K A C K A C K Stop Slave Address Start Data (n) N O A C K Figure 5-13. Random Address Byte Read Operation |
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