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MCT8317A Datasheet(PDF) 118 Page - Texas Instruments

Part # MCT8317A
Description  MCT8317A High Speed Sensorless Trapezoidal Control Integrated FET BLDC Driver
PDF  161 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MCT8317A Datasheet(HTML) 118 Page - Texas Instruments

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8.7.3.2 PIN_CONFIG2 Register (Offset = A8h) [Reset = 00000000h]
PIN_CONFIG2 is shown in Figure 8-69 and described in Table 8-35.
Return to the Table 8-32.
Register to configure hardware pins
Figure 8-69. PIN_CONFIG2 Register
31
30
29
28
27
26
25
24
PARITY
DAC_SOX_CONFIG
SLEEP_TIME
I2C_TARGET_ADDR
R/W-0h
R/W-0h
R/W-0h
R/W-0h
23
22
21
20
19
18
17
16
I2C_TARGET_ADDR
DAC_OUT_EN
EXT_WD_EN
EXT_WD_INPU
T
EXT_WD_FAUL
T
R/W-0h
R/W-0h
R/W-0h
R/W-0h
R/W-0h
15
14
13
12
11
10
9
8
EXT_WD_FREQ
FG_CONFIG
FG_PIN_FAULT_CONFIG
FG_PIN_STOP_CONFIG
TBLANK
R/W-0h
R/W-0h
R/W-0h
R/W-0h
R/W-0h
7
6
5
4
3
2
1
0
TBLANK
TPWDTH
ZERO_DUTY_HYST
R/W-0h
R/W-0h
R/W-0h
Table 8-35. PIN_CONFIG2 Register Field Descriptions
Bit
Field
Type
Reset
Description
31
PARITY
R/W
0h
Parity bit
30-29
DAC_SOX_CONFIG
R/W
0h
DAC/SOx Pin 32 Configuration
0h = DACOUT2
1h = SOA
2h = SOB
3h = SOC
28-27
SLEEP_TIME
R/W
0h
Sleep Time
0h = Check low for 50 µs
1h = Check low for 200 µs
2h = Check low for 20 ms
3h = Check low for 200 ms
26-20
I2C_TARGET_ADDR
R/W
0h
I2C target address
19
DAC_OUT_EN
R/W
0h
Enable DAC Outputs
0h = Disable
1h = Enable
18
EXT_WD_EN
R/W
0h
Enable external watchdog on pin29
0h = Disable
1h = Enable
17
EXT_WD_INPUT
R/W
0h
External watchdog source
0h = I2C
1h = GPIO
16
EXT_WD_FAULT
R/W
0h
External watchdog fault mode
0h = Report only
1h = Latched fault with Hi-Z outputs
15-14
EXT_WD_FREQ
R/W
0h
External watchdog frequency
0h = 10Hz
1h = 5Hz
2h = 2Hz
3h = 1Hz
MCT8317A
SLLSFQ2 – JANUARY 2023
www.ti.com
118
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Product Folder Links: MCT8317A



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