Philips Semiconductors

Product specification

74F198

8-bit bidirectional universal shift register

October 2, 1987

3

LOGIC SYMBOL

Q0 Q1 Q2 Q3

46

8

10

GND = Pin 12

13

1

23

11

MR

S0

S1

CP

D1 D2

79

SF00161

D3

D0

35

Q5 Q6 Q7

14

16

18

20

D5 D6

19

21

D7

D4

15

17

Q4

222

IEC/IEEE SYMBOL

SF00162

R

15

17

19

21

22

3

5

7

9

2

11

1

13

0

SRG8

C4

1

→ /2 ←

1, 4D

3, 4D

3, 4D

14

16

18

20

4

8

10

23

1

M

0

3

3, 4D

2, 4D

6

FUNCTION TABLE

INPUTS

OUTPUTS

MR

MODE

CP

SERIAL

PARALLEL

Q0

Q1

Q6

Q7

MR

S0

S1

CP

LEFT

RIGHT

0

…7

Q0

Q1

…

Q6

Q7

L

X

X

X

X

X

X

L

L

L

L

H

X

X

L

X

X

X

Q00

Q10

Q60

Q70

H

H

H

↑

X

X

0

…7

0

16

7

H

H

L

↑

X

H

X

H

Q0n

Q5n

Q6n

H

H

L

↑

X

L

X

L

Q0n

Q5n

Q6n

H

L

H

↑

H

X

X

Q1n

Q2n

Q7n

H

H

L

H

↑

L

X

X

Q1n

Q2n

Q7n

L

H

L

L

X

X

X

X

Q00

Q10

Q60

Q70

H

=

High voltage level

L

=

Low voltage level

X

=

Don’t care

↑

=

Low-to-High transition of designated input

0

…7

=

The level of steady input at inputs 0 through 7, respectively.

Q00, Q10, Q60, Q70

= The level of Q0, Q1, Q6, Q7, respectively, before the indicated steady state input conditions were established.

Q0n, Q1n, Q6n, Q7n

= The level of Q0, Q1, Q6, Q7, respectively, before the most recent Low-to-High clock transition.