Philips Semiconductors

Product specification

74F240/74F240A/

74F241/74F241A

Buffers

2

January 2, 1991

853–0355 01345

FEATURES

(74F240A/74F241A)

DESCRIPTION

The 74F240 and 74F241 are octal buffers that are ideal for

driving bus lines of buffer memory address registers. The

outputs are all capable of sinking 64mA and sourcing up to

15mA. The device features two output enables, each

controlling four of the 3–state outputs.

The 74F240A and 74F241A are functionally equivalent to

their non–A counterparts. They have been designed to

reduce effects of ground noise. Other advantages are noted

in the features.

TYPE

TYPICAL PROPAGATION DELAY

TYPICAL SUPPLY CURRENT (TOTAL)

74F240

4.3ns

37mA

74F240A

3.8ns

40mA

74F241

5.0ns

53mA

74F241A

4.5ns

32mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

PKG DWG #

20–pin plastic DIP

N74F240N, N74F240AN, N74F241N, N74F241AN

SOT146-1

20–pin plastic SOL

N74F240D, N74F240AD, N74F241D, N74F241AD

SOT163-1

20-pin plastic SSOP II

N74F240DB

SOT339-1

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS

DESCRIPTION

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Data inputs (74F240)

1.0/1.67

20

µA/1.0mA

Ian, Ibn

Data inputs (74F240A)

1.0/0.167

20

µA/100µA

Data inputs (74F241)

1.0/2.67

20

µA/1.6mA

Data inputs (74F241A)

1.0/0.067

20

µA/40µA

OEa, OEb

Output enable inputs (active low) (74F240)

1.0/0.33

20

µA/0.2mA

Output enable inputs (active low) (74F240A)

1.0/0.167

20

µA/100µA

OEa, OEb

Output enable input (74F241)

1.0/1.67

20

µA/1.0mA

Output enable input (74F241A)

1.0/0.067

20

µA/40µA

Yan, Ybn

Data outputs (74F241, 74F241A)

750/106.7

15mA/64mA

Yan, Ybn

Data outputs (74F240, 74F240A)

750/106.7

15mA/64mA

Note to input and output loading and fan out table

One (1.0) FAST unit load is defined as: 20

µA in the high state and 0.6mA in the low state.