Philips Semiconductors

Product specification

74F253

Dual 4-input multiplexer (3-State)

2

1988 Nov 29

853–0101 95206

FEATURES

DESCRIPTION

The 74F253 has two identical 4-input multiplexers with 3-State

outputs which select two bits from four sources selected by common

Select inputs (S0, S1). When the individual Output Enable (OEa,

OEb) inputs of the 4-input multiplexers are High, the outputs are

forced to a high impedance (Hi-Z) state.

The 74F253 is the logic implementation of a 2-pole, 4-position

switch; the position of the switch being determined by the logic

levels supplied to the two common Select inputs.

To avoid exceeding the maximum current ratings when the outputs

of the 3-State devices are tied together, all but one device must be

in the high-impedance state. Therefore, only one Output Enable

must be active at a time.

PIN CONFIGURATION

16

15

14

13

12

11

10

7

6

5

4

3

2

1

Ya

I2b

I1b

I0b

I3b

OEb

S0

OEa

S1

I0a

I3a

I2a

I1a

9

8

GND

Yb

SF00798

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL

SUPPLY CURRENT

(TOTAL)

74F253

7.0ns

12mA

ORDERING INFORMATION

COMMERCIAL RANGE

DESCRIPTION

PKG DWG #

16-pin plastic DIP

N74F253N

SOT38-4

16-pin plastic SO

N74F253D

SOT109-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F (U.L.) HIGH/LOW

LOAD VALUE HIGH/LOW

I0a–I3a

Port A data inputs

1.0/1.0

20

µA/0.6mA

I0b–I3b

Port B data inputs

1.0/1.0

20

µA/0.6mA

S0, S1

Common Select inputs

1.0/1.0

20

µA/0.6mA

OEa

Port A Output Enable input (active Low)

1.0/1.0

20

µA/0.6mA

OEb

Port B Output Enable input (active Low)

1.0/1.0

20

µA/0.6mA

Ya, Yb

3-State outputs

150/40

3mA/24mA

NOTE:

One (1.0) FAST unit load is defined as: 20

µA in the High state and 0.6mA in the Low state.

LOGIC SYMBOL

3

4

5

GND = Pin 8

SF00799

9

7

14

2

1

S0

S1

OEa

15

6

13

12

11

10

OEb

Ya

Yb

I0a

I1a

I2a

I3a

I0b

I1b

I2b

I3b

IEC/IEEE SYMBOL

SF00800

MUX

1

6

15

10

11

7

9

0

5

2

EN

4

3

13

12

1

3

0

G

0

3

1

14

2