Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

74F533 Octal Transparent Latch, Inverting (3-State)

74F534 Octal D Flip-Flop, Inverting (3-State)

2

1999 Jan 08

853-0374 20616

* Discontinued part. Please see the Discontinued Products List.

FEATURES

DESCRIPTION

The 74F533 is an octal transparent latch coupled to eight 3-State

output buffers. The two sections of the device are controlled

independently by Enable (E) and Output Enable (OE) control gates.

The data on the D inputs is transferred to the latch outputs when the

Enable (E) input is High. The latch remains transparent to the data

input while E is High and stores the data that is present one setup

time before the High-to-Low enable transition.

The 3-State output buffers are designed to drive heavily loaded

3-State buses, MOS memories, or MOS microprocessors. The

active Low Output Enable (OE) controls all eight 3-State buffers

independent of the latch operation. When OE is Low, the latched or

transparent data appears at the outputs. When OE is High, the

outputs are in high impedance “off” state, which means they will

neither drive nor load the bus.

The 74F534 is an 8-bit edge-triggered register coupled to eight

3-State output buffers. The two sections of the device are controlled

independently by the Clock (CP) and Output Enable (OE) control

gates.

The register is fully edge-triggered. The state of each D input, one

setup time before the Low-to-High clock transition is transferred to

the corresponding flip-flop’s Q output.

The 3-State output buffers are designed to drive heavily loaded

3-State buses, MOS memories, or MOS microprocessors. The

active Low Output Enable (OE) controls all eight 3-State buffers

independent of the latch operation. When OE is Low, the latched or

transparent data appears at the outputs. When OE is High, the

outputs are in high impedance “off” state, which means they will

neither drive nor load the bus.

TYPE

TYPICAL

PROPAGATION DELAY

TYPICAL SUPPLY

CURRENT

(TOTAL)

74F533

5.5ns

41mA

TYPE

TYPICAL SUPPLY

CURRENT

(TOTAL)

74F534

165MHz

51mA

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL

RANGE

PKG DWG #

20-Pin Plastic DIP

N74F534N

SOT146-1

20-Pin Plastic SOL

N74F534D

SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

D0 - D7

Data inputs

1.0/1.0

20

µA/0.6mA

E (74F533)

Enable input (active High)

1.0/1.0

20

µA/0.6mA

OE

Output Enable input (active Low)

1.0/1.0

20

µA/0.6mA

CP (74F534)

Clock Pulse input (active rising edge)

1.0/1.0

20

µA/0.6mA

Q0 - Q7

Data outputs

150/40

3.0mA/24mA