74F74 datasheet(5/8 Pages) PHILIPS

5 / 8 page

Philips Semiconductors

Product specification

74F74

Dual D-type flip-flop

1996 Mar 12

AC WAVEFORMS

For all waveforms, VM = 1.5V.

The shaded areas indicate when the input is permitted to

change for predictable output performance.

CPn

tsu(H)

th(H)

tw(H)

1/fmax

tsu(L)

th(L)

tPLH

tw(L)

tPHL

tPLH

SF01276

Waveform 1.

Propagation delay for data to output, data setup

time and hold times, and clock width, and maximum clock

frequency

RDn

tPLH

tw(L)

tPHL

tPLH

SDn

tw(L)

SF00050

Waveform 2.

Propagation delay for set and reset to output,

set and reset pulse width

SDn or RDn

trec

CPn

SF00051

Waveform 3.

Recovery time for set or reset to clock

TEST CIRCUIT AND WAVEFORMS

90%

10%

90%

10%

90%

10%

90%

10%

NEGATIVE

PULSE

POSITIVE

PULSE

AMP (V)

tTHL (tf )

INPUT PULSE REQUIREMENTS

rep. rate

tTLH

tTHL

1MHz

500ns

2.5ns

Input Pulse Definition

VCC

family

74F

D.U.T.

PULSE

GENERATOR

VIN

VOUT

Test Circuit for Totem-Pole Outputs

DEFINITIONS:

RL = Load resistor;

see AC ELECTRICAL CHARACTERISTICS for value.

CL = Load capacitance includes jig and probe capacitance;

see AC ELECTRICAL CHARACTERISTICS for value.

RT = Termination resistance should be equal to ZOUT of

pulse generators.

tTHL (tf )

tTLH (tr )

AMP (V)

amplitude

3.0V

1.5V

SF00006

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