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74F8961 Datasheet(PDF) 3 Page - NXP Semiconductors |
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74F8961 Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 11 page ![]() Philips Semiconductors FAST Products Product specification 74F8960/74F8961 Octal latched bidirectional Futurebus transceivers (3-State + open-collector) December 19, 1990 3 IEC/IEEE SYMBOL FOR 74F8960 IEC/IEEE SYMBOL FOR 74F8961 74F8960 74F8961 3 2 3 & EN2 EN3 C1 1D 27 26 24 23 21 20 19 17 5 6 7 9 10 11 13 15 16 28 2 3 2 3 & EN2 EN3 C1 1D 27 26 24 23 21 20 19 17 5 6 7 9 10 11 13 15 16 28 2 PIN DESCRIPTION SYMBOL PINS TYPE NAME AND FUNCTION A0 – A7 3, 5, 6, 7, 9, 10, 12, 13 I/O PNP latched input/3–state output (with VX control option) B0 – B7 27, 26, 24, 23, 21, 20, 19, 17 I/O Data input with special threshold circuitry to reject noise/ open collector output, high current drive OEB0 15 Input Enables the B outputs when both pins are low OEB1 16 Input Enables the A outputs when high LE 28 Input Latched when high (a special feature is buillt in for proper enabling times) VX 14 Input Clamping voltage keeping VOH from rising above VX (VX = Vcc for normal use) |
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