PIC16F15213 datasheet(157/439 Pages) MICROCHIP

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19.3

Timer0 Output and Interrupt

19.3.1

Timer0 Output

TMR0_out toggles on every match between TMR0L and TMR0H in 8-bit mode, or when TMR0H:TMR0L rolls over

in 16-bit mode. If the output postscaler is used, the output is scaled by the ratio selected. The Timer0 output can

be routed to an I/O pin via the RxyPPS output selection register, or internally to a number of Core Independent

Peripherals. The Timer0 output can be monitored through software via the OUT output bit.

19.3.2

Timer0 Interrupt

The Timer0 Interrupt Flag (TMR0IF) bit is set when the TMR0_out toggles. If the Timer0 interrupt is enabled

(TMR0IE), the CPU will be interrupted when the TMR0IF bit is set. When the postscaler bits (T0OUTPS) are set to

1:1 operation (no division), the T0IF flag bit will be set with every TMR0 match or rollover. In general, the TMR0IF flag

bit will be set every T0OUTPS +1 matches or rollovers.

19.3.3

Timer0 Example

Timer0 Configuration:

• Timer0 mode = 16-bit

• Clock Source = FOSC/4 (250 kHz)

• Synchronous operation

• Prescaler = 1:1

• Postscaler = 1:2 (T0OUTPS = 1)

In this case, the TMR0_out toggles every two rollovers of TMR0H:TMR0L.

i.e., (0xFFFF)*2*(1/250 kHz) = 524.28 ms

19.4

Operation During Sleep

When operating synchronously, Timer0 will halt when the device enters Sleep mode. When operating asynchronously

and the selected clock source is active, Timer0 will continue to increment and wake the device from Sleep mode if the

Timer0 interrupt is enabled.

19.5

PIC16F15213/14/23/24/43/44

TMR0 - Timer0 Module

and its subsidiaries

Data Sheet

DS40002195E-page 157

PIC16F15213 Datasheet(PDF) 157 Page - Microchip Technology