ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005

10

MMM5063 Advance Information

MOTOROLA

Application Information

4 Application Information

4.1 Power Control Considerations

The MMM5063 is designed for open loop (drain control) applications. A PMOS FET is used to switch the

concept schematic (see Figure 22) describes the application circuit used to control the device through the

drain voltage.

A drain control provides a linear transfer function which is repeatable versus control voltage (see

Figure 16).

Figure 16. Output Power versus Drain Voltage

4.2 GSM Second Harmonic (H2) Trap Circuitry

When transmitting in GSM saturated mode, the second harmonic is naturally present at the RF output of

the PA and reaches the antenna after additional filtering in the front-end. ETSI specifies that harmonic

level cannot exceed -36 dBm. In order to improve H2 rejection in low Band (GSM), an H2 trap has been

developed. The topology is based on a Low Pass

π Cell Filter (see Figure 17) where the first shunt

capacitor is actually part of the PA output match.

Figure 17. Low Pass Filter

This circuit reduces H2 level by 7 to 8 dB with low in-band insertion losses (mainly due to the series

inductor). Moreover, this structure can be used to match Power amplifier module output to the

switchplexer.

4.0

0

V

D

2.0

4.0

6.0

8.0

10

12

14

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

7.5 nH

Coilcraft

0603

8.2 pF

0402 Murata

460 pH

2.2 pF

0402 Murata

460 pH

Switchplexer

GSM Out

Freescale Semiconductor, Inc.

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