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ADS1198 Datasheet(PDF) 69 Page - Texas Instruments |
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ADS1198 Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 110 page  ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R www.ti.com SBAS459K – JANUARY 2010 – REVISED AUGUST 2015 9.6.1.4 CONFIG3: Configuration Register 3 (address = 03h) (reset = 40h) Configuration register 3 configures multireference and RLD operation. Figure 77. CONFIG3: Configuration Register 3 7 6 5 4 3 2 1 0 PD_REFBUF 1 VREF_4V RLD_MEAS RLDREF_INT PD_RLD RLD_LOFF_SE RLD_STAT NS R/W-0h R/W-1h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 20. Configuration Register 3 Field Descriptions Bit Field Type Reset Description 7 PD_REFBUF R/W 0h Power-down reference buffer This bit determines the power-down reference buffer state. 0 = Power-down internal reference buffer 1 = Enable internal reference buffer 6 RESERVED R/W 1h Reserved Always write 1h 5 VREF_4V R/W 0h Reference voltage This bit determines the reference voltage, VREFP. 0 = VREFP is set to 2.4 V 1 = VREFP is set to 4 V (use only with a 5-V analog supply) 4 RLD_MEAS R/W 0h RLD measurement This bit enables RLD measurement. The RLD signal may be measured with any channel. 0 = Open 1 = RLD_IN signal is routed to the channel that has the MUX_Setting 010 (VREF) 3 RLDREF_INT R/W 0h RLDREF signal This bit determines the RLDREF signal source. 0 = RLDREF signal fed externally 1 = RLDREF signal (AVDD – AVSS) / 2 generated internally 2 PD_RLD R/W 0h RLD buffer power This bit determines the RLD buffer power state. 0 = RLD buffer is powered down 1 = RLD buffer is enabled 1 RLD_LOFF_SENS R/W 0h RLD sense function This bit enables the RLD sense function. 0 = RLD sense is disabled 1 = RLD sense is enabled 0 RLD_STAT R 0h RLD lead-off status This bit determines the RLD status. 0 = RLD is connected 1 = RLD is not connected Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 69 Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R |
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