EFP01 datasheet(103/158 Pages) SILABS

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6.2.11 CMD

Offset

Bit Position

0x10

Reset

Access

Name

Table 6.11. CMD

Bit

Name

Reset

Access

Description

ADC_START

write-only

Initiates a single ADC VDD Voltage measurement.

Before kicking of the ADC measurement, firmware should

set ADC_CC_CTRL.ADC_INTERVAL=0 to disable auto-

mated ADC operation and clear the ADC output registers.

ADC_CLR

write-only

If ADC_CLR is set, the next ADC voltage measurement

value (triggered automatically or with ADC_START=1) will

be loaded directly into all three 12-bit ADC output result

registers.

CC_CLR

write-only

Clear all Coulomb counters (CCA_MSBY, CCA_LSBY,

CCB0_MSBY, CCB0_LSBY, CCB2_MSBY, CCB2_LSBY,

CCC_MSBY, CCC_LSBY)

CC_CAL_STRT

write-only

Initiate calibration of Coulomb counter

RESERVED

Reserved. Always write bits to 0.

OTP_REREAD

write-only

Force OTP to be re-read. Will result in the internal control

registers being overwritten to their out-of-reset default

state.

RESERVED

Reserved. Always write bits to 0.

RESET

write-only

Forces a full reset, equivalent to a power supply brownout.

All internal registers will be cleared to '0', then the OPN

defaults will be reloaded into the registers from OTP.

Note use of this bit is not recommended. A reset means

that any enabled DCDC outputs are going to be disabled

(i.e, when their mode bitfields are cleared to '0') until the

OTP default settings are loaded (which can take up to

400usec). The output voltage will be maintained during

this period only by the output capacitor, resulting in a pow-

er supply-brownout if the load current is large enough to

pull the output capacitor voltage below the brownout

threshold.

Recommend use of the OTP_REREAD bit instead, which

will simply repaint the EFP01 registers with the default set-

tings from OTP. Any converters enabled by default will re-

main enabled when using OTP_REREAD.

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