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6.2.21 VDD_AVG_MSN

Offset

Bit Position

0x1B

Reset

0x00

Access

Name

Table 6.21. VDD_AVG_MSN

Bit

Name

Reset

Access

Description

7:4

RESERVED

Reserved. Always write bits to 0.

3:0

VDD_AVG_MSN

0x00

read-only

Most significant nibble of measured VDDA or VDDB pin

IIR low-pass filtered average voltage since last clear. The

time constant of the IIR filter is set by

ADC_CC_CTRL.ADC_IIR_TAU. The VDDA pin will be

measured only if a supply is present on that pin (i.e.,

CC_MODE.SC_MODE=1), otherwise the VDDB pin is

measured.

Note that this value is spread over 2 registers and may be

continuously updated. To ensure that the capture of the

process, addressing this read-only register causes an in-

hibition in the updating of the register.

To ensure coherence when reading the most significant

and least significant bytes, a MSBY register read causes

the corresponding LSBY register value to be stored into a

shadow register. Reading the LSBY register will then re-

turn the value stored in the LSBY shadow register.

VDDB (mV) = ((VDD_xxx_MSN<<8) + VDD_xxx_LSBY) ×

1.49

VDDA (mV) = ((VDD_xxx_MSN<<8) + VDD_xxx_LSBY) ×

1.01

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