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82P33731 Datasheet(PDF) 23 Page - Renesas Technology Corp |
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82P33731 Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 66 page ![]() 22 ©2017 Integrated Device Technology, Inc. August 28, 2017 82P33731 Datasheet 3.2.3.2 Input Clock Quality Monitoring The qualities of all the input clocks are always monitored in the fol- lowing aspects: • LOS (loss of signal) (only for IN1 and IN2) • Activity • Frequency LOS monitoring is only conducted on IN1 and IN2. Activity and fre- quency monitoring are conducted on all the input clocks. The qualified clocks are available for selection for all 3 DPLLs. 3.2.3.2.1 Loss of Signal (LOS) Monitoring IN1 and IN2 support the AMI input signal. LOS monitoring is con- ducted on IN1 and IN2. A LOS event occurs when the amplitude of the input clock falls below +0.6 Vp-p for 1 ms; the LOS event is cleared when the amplitude rises higher than +1 Vp-p. LOS status is indicated by the AMI1_LOS / AMI2_LOS bit. If the AMI1_LOS / AMI2_LOS bit is ‘1’, the occurrence of LOS will trigger an interrupt. The input clock in LOS status is disqualified for clock selection for the DPLL. 3.2.3.2.2 Activity Monitoring Activity is monitored by using an internal leaky bucket accumulator, as shown in Figure 9. Each input clock is assigned an internal leaky bucket accumulator. The input clock is monitored for each period of 128 ms, the internal leaky bucket accumulator is increased by 1 when an event is detected; and it is decreased by 1 when no event is detected within the period set by the decay rate. The event is that an input clock drifts outside (>) ±500 ppm with respect to the system clock within a 128 ms period. There are four configurations (0 - 3) for a leaky bucket accumulator. The leaky bucket configuration for an input clock is selected by the cor- responding BUCKET_SEL[1:0] bits. Each leaky bucket configuration consists of four elements: upper threshold, lower threshold, bucket size and decay rate. The bucket size is the capability of the accumulator. If the number of the accumulated events reach the bucket size, the accumulator will stop increasing even if further events are detected. The upper threshold is a point above which a no-activity alarm is raised. The lower threshold is a point below which the no-activity alarm is cleared. The decay rate is a certain period during which the accumulator decreases by 1 if no event is detected. The leaky bucket configuration is programmed by one of four groups of register bits: the BUCKET_SIZE_n_DATA[7:0] bits, the UPPER_ THRESHOLD_n_DATA[7:0] bits, the LOWER_THRESHOLD_n_ DATA[7:0] bits and the DECAY_RATE_n_DATA[1:0] bits respectively; ‘n’ is 0 ~ 3. The no-activity alarm status of the input clock is indicated by the INn_NO_ACTIVITY_ALARM bit (14 n 1). The input clock with a no-activity alarm is disqualified for clock selec- tion for the DPLLs. Figure 9. Input Clock Activity Monitoring Input Clock Leaky Bucket Accumulator No-activity Alarm Indication Decay Rate Bucket Size Upper Threshold Lower Threshold 0 clock signal with no event clock signal with events |
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