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70V37L Datasheet(PDF) 2 Page - Renesas Technology Corp |
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70V37L Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 19 page ![]() 6.42 70V37L High-Speed 3.3V 32K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 2 Description TheIDT70V37isahigh-speed32Kx18Dual-PortStaticRAM. The IDT70V37 is designed to be used as a stand-alone 576K-bit Dual-PortRAMorasacombinationMASTER/SLAVEDual-PortRAMfor 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-PortRAMapproachin36-bitorwidermemorysystemapplications resultsinfull-speed,error-freeoperationwithouttheneedforadditional discretelogic. This device provides two independent ports with separate control, address,andI/Opinsthatpermitindependent,asynchronousaccessfor reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permittheon-chipcircuitryofeachporttoenteraverylowstandbypower mode. Fabricated using CMOS high-performance technology, these de- vices typically operate on only 440mW of power. The IDT70V37 is packaged in a 100-pin Thin Quad Flatpack (TQFP). NOTES: 1. All VDD pins must be connected to power supply. 2. All VSS pins must be connected to ground. 3. Package body is approximately 14mm x 14mm x 1.4mm. 4. This package code is used to reference the package diagram. Pin Configurations(1,2,3) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 I/O10R 4851 drw 02 I/O5R I/O4R I/O3R I/O2R I/O0R I/O0L VSS I/O2L I/O4L I/O5L I/O6L I/O7L I/O3L I/O1R I/O7R I/O8R I/O9R I/O8L I/O9L I/O6R A7R A8L A7L A6R A5R A4R A3R A2R A1R A0R INTR BUSYR M/ S BUSYL INTL A0L A2L A3L A5L A6L A1L A4L VSS VDD I/O1L VDD VDD 70V37 PNG100(4) 100-Pin TQFP Top View VSS VSS |
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