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CD4512BMS Datasheet(PDF) 6 Page - Renesas Technology Corp

Part # CD4512BMS
Description  CMOS Dual 4-Bit Latch
PDF  8 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

CD4512BMS Datasheet(HTML) 6 Page - Renesas Technology Corp

  CD4512BMS Datasheet HTML 1Page - Renesas Technology Corp CD4512BMS Datasheet HTML 2Page - Renesas Technology Corp CD4512BMS Datasheet HTML 3Page - Renesas Technology Corp CD4512BMS Datasheet HTML 4Page - Renesas Technology Corp CD4512BMS Datasheet HTML 5Page - Renesas Technology Corp CD4512BMS Datasheet HTML 6Page - Renesas Technology Corp CD4512BMS Datasheet HTML 7Page - Renesas Technology Corp CD4512BMS Datasheet HTML 8Page - Renesas Technology Corp  
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CD4512BMS
FN3340 Rev 0.00
Page 6 of 8
December 1992
Logic Diagram
FIGURE 1. LOGIC DIAGRAM
TRUTH TABLE
SELECT CONT.
INH
3-STATE
DISABLE
SELECT
OUTPUT
ABC
000
0
0
D0
100
0
0
D1
010
0
0
D2
110
0
0
D3
001
0
0
D4
101
0
0
D5
011
0
0
D6
111
0
0
D7
XX
X
1
0
0
X
X
X
X
1
High Z
1 = HIGH LEVEL
0 = LOW LEVEL
X = DON’T CARE
* All inputs protected by CMOS protection network.
VDD
VSS
VSS
VDD
p
n
p
n
3-STATE
14
SELECT
OUTPUT
DISABLE
p
n
p
n
p
n
p
n
p
n
p
n
p
n
p
n
p
n
p
n
p
n
p
n
11*
A
1 *
D0
2 *
D1
3 *
D2
4 *
D3
5 *
D4
6 *
D5
7 *
D6
9 *
D7
12*
B
13*
C
10*
INHIBIT
15*
p
n



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