80C575 datasheet(21/40 Pages) PHILIPS

21 / 40 page

Philips Semiconductors

Product specification

80C575/83C575/

87C575

80C51 8-bit microcontroller family

8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer

1998 May 01

SMOD1

SMOD0

–

POF

LVF

GF0

GF1

IDL

PCON

(87H)

SM0 / FE

SM1

SM2

REN

TB8

RB8

SCON

(98H)

STOP

BIT

DATA BYTE

ONLY IN

MODE 2, 3

START

BIT

SET FE BIT IF STOP BIT IS 0 (FRAMING ERROR)

SM0 TO UART MODE CONTROL

0 : SCON.7 = SM0

1 : SCON.7 = FE

SU00044

Figure 19. UART Framing Error Detection

Using the Automatic Address Recognition

feature allows a master to selectively

communicate with one or more slaves by

invoking the Given slave address or

addresses. All of the slaves may be

contacted by using the Broadcast address.

Two special Function Registers are used to

define the slave’s address, SADDR, and the

address mask, SADEN. SADEN is used to

define which bits in the SADDR are to b used

and which bits are “don’t care”. The SADEN

mask can be logically ANDed with the

SADDR to create the “Given” address which

the master will use for addressing each of the

slaves. Use of the Given address allows

multiple slaves to be recognized while

excluding others. The following examples will

help to show the versatility of this scheme:

Slave 0

SADDR

1100 0000

SADEN

1111

1101

Given

1100 00X0

Slave 1

SADDR

1100 0000

SADEN

1111

1110

Given

1100 000X

In the above example SADDR is the same

and the SADEN data is used to differentiate

between the two slaves. Slave 0 requires a 0

in bit 0 and it ignores bit 1. Slave 1 requires a

0 in bit 1 and bit 0 is ignored. A unique

address for Slave 0 would be 1100 0010

since slave 1 requires a 0 in bit 1. A unique

address for slave 1 would be 1100 0001

since a 1 in bit 0 will exclude slave 0. Both

slaves can be selected at the same time by

an address which has bit 0 = 0 (for slave 0)

and bit 1 = 0 (for slave 1). Thus, both could

be addressed with 1100 0000.

In a more complex system the following could

be used to select slaves 1 and 2 while

excluding slave 0:

Slave 0

SADDR

1100 0000

SADEN

1111

1001

Given

1100 0XX0

Slave 1

SADDR

1110 0000

SADEN

1111

1010

Given

1110 0X0X

Slave 2

SADDR

1110 0000

SADEN

1111

1100

Given

1110 00XX

In the above example the differentiation

among the 3 slaves is in the lower 3 address

bits. Slave 0 requires that bit 0 = 0 and it can

be uniquely addressed by 1110 0110. Slave 1

requires that bit 1 = 0 and it can be uniquely

addressed by 1110 and 0101. Slave 2

requires that bit 2 = 0 and its unique address

is 1110 0011. To select Slaves 0 and 1 and

exclude Slave 2 use address 1110 0100,

since it is necessary t make bit 2 = 1 to

exclude slave 2.

The Broadcast Address for each slave is

created by taking the logical OR of SADDR

and SADEN. Zeros in this result are treated

as don’t-cares. In most cases, interpreting

the don’t-cares as ones, the broadcast

address will be FF hexadecimal.

Upon reset SADDR (SFR address 0A9H) and

SADEN (SFR address 0B9H) are loaded with

0s. This produces a given address of all

“don’t cares” as well as a Broadcast address

of all “don’t cares”. this effectively disables

the Automatic Addressing mode and allows

the microcontroller to use standard 80C51

type UART drivers which do not make use of

this feature.

Analog Comparators

Four analog comparators are provided on

chip. Three comparators have a common

negative reference CMPR- and independent

positive inputs CMP1+, CMP2+, CMP3+ on

port 3. The fourth comparator has

independent positive and negative inputs

CMP0+ and CMP0- on port 1. The CMP

each comparator. The CMP register is bit

addressable and is located at SFR address

E8H. Figure 21 shows the connection of the

comparators.

Pullups at the comparator input pins will be

disabled by hardware when the comparator is

enabled. In addition, to make inputs high

impedance, the corresponding port SFR bits

must be set by software to disable the

pulldowns.

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