DA9062 datasheet(39/101 Pages) RENESAS

39 / 101 page

DA9062

PMIC for Applications Requiring up to 8.5 A

Datasheet

Revision 3.8

15-Feb-2022

CFR0011-120-00

39 of 99

A repeated write mode can be enabled with WRITE_MODE register. In this mode, the master can

execute back-to-back write operations to non-consecutive addresses by transmitting register

addresses and data pairs. The data is stored in the address specified by the preceding byte. The

repeated write mode is illustrated in Figure 17.

SLAVEadr W A

REGadr

DATA

S = START condition

A = Acknowledge (low)

Sr = Repeat START condition

* = No Acknowledge

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

Slave to Master

7-bits

1 bit

8-bits

REGadr

1-bit

8-bits

DATA

……….

8-bits

Repeated writes

Figure 17: 2-Wire Repeated Write

If a new START or STOP condition occurs within a message, the bus returns to idle mode.

8.3

GPIOs

DA9062 features five general purpose IO pins. The basic structure of the GPIOs is depicted in

Figure 18. As illustrated, there are several additional functions:

● analog function

● alternate function

● forwarding

● regulator control

● sequencer WAIT_STEP

● interrupt and wakeup generation

The GPIOs are operational in POWERDOWN and ACTIVE modes. However, GPIs can be

configured as disabled in POWERDOWN mode in register PD_DIS (register GPI_DIS). In other

modes, the GPIO is disabled and all ports are configured as open-drain outputs in high impedance

state. The level transitions on inputs will no longer be detected, but I/O drivers will keep their

configuration and programmed levels.

GPIOx_PUPD

Debounce

GPIx

GPIOx_MODE

Edge

detection

GPIOx_TYPE

E_GPIOx

Mask

M_GPIOx

GPIOx_MODE

GPIOx_PUPD

VDDIO

Wakeup

selection

VDDIO

Interrupt

Wakeup

Output

function

GPIOx_OUT

Alternate

function

GPIOx_PIN

GPO OD

GPO push-pull

GPI

Forwarding input

Forwarding

output

GPIOx_WKUP_MODE

Sequencer (WAIT_STEP),

regulator control

Wakeup

enable

GPIOx_WEN

Sequencer

CLK_32K

VDD_FAULT

Analog function

GPIOx_PIN

Figure 18: General GPIO Block Diagram

The functionality of a GPIO is configured in GPIO<x>_PIN, as listed in Table 24.

DA9062 Datasheet(PDF) 39 Page - Renesas Technology Corp

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