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85352AYILF Datasheet(PDF) 13 Page - Renesas Technology Corp

Part # 85352AYILF
Description  12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer
PDF  21 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

85352AYILF Datasheet(HTML) 13 Page - Renesas Technology Corp

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©2015 Integrated Device Technology, Inc.
Revision C, December 1, 2015
85352 Datasheet
Application Schematic Example
Figure 6 shows an example of 85352 application schematic. In this
example, the device is operated at V
CC = 3.3V. The decoupling
capacitor should be located as close as possible to the power pin. For
the LVPECL output drivers, only two terminations examples are
shown in this schematic. Additional termination approaches can be
found in the LVPECL Termination Application Note.
Figure 6. 85352 Application Schematic
R4
133
CLK0
R2
50
Zo = 50
SEL5
SEL1
SEL9
(U1-15)
+
-
(U1-48)
VCC0
C7
.1uF
C3
.1uF
(U1-13)
Optional Termination
SEL10
C4
.1uF
Vcc = Vcco = 3.3V
C5
.1uF
SEL0
SEL7
Vcco = 3.3V
(U1-22)
R5
82.5
(U1-24)
C2
0.1uF
C1
10uf
U1
85352
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q8
nQ8
Q9
nQ9
Q10
nQ10
Q11
nQ11
SEL2
Zo = 50
SEL6
C6
.1uF
R6
133
+
-
CLK1
nCLK1
R3
50
R7
82.5
Zo = 50
R1
50
SEL11
Zo = 50
(U1-37)
SEL4
SEL3
SEL8
nCLK0
VCC
C1
10uf



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