ADIS16003

Rev. 0 | Page 11 of 16

THEORY OF OPERATION

ACCELEROMETER SERIAL INTERFACE

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3

2

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7

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Top View

Not to Scale

DIGITAL OUTPUT (IN LSBs)

X-AXIS: 1229

Y-AXIS: 2048

DIGITAL OUTPUT (IN LSBs)

X-AXIS: 2867

Y-AXIS: 2048

DIGITAL OUTPUT (IN LSBs)

X-AXIS: 2048

Y-AXIS: 2867

DIGITAL OUTPUT (IN LSBs)

X-AXIS: 2048

Y-AXIS: 1229

DIGITAL OUTPUT (IN LSBs)

X-AXIS: 2048

Y-AXIS: 2048

Figure 3 shows the detailed timing diagram for serial inter-

facing to the accelerometer in the ADIS16003. The serial clock

provides the conversion clock. CS initiates the data transfer and

conversion process and frames the serial data transfer for the

accelerometer output. The accelerometer output is sampled on

the second rising edge of the SCLK input after the falling edge

of the CS. The conversion requires 16 SCLK cycles to complete.

The rising edge of

Figure 23. Output Response vs. Orientation

The ADIS16003 is a low cost, low power, complete dual-axis

accelerometer with an integrated serial peripheral interface

(SPI) and an integrated temperature sensor whose output is also

available on the SPI interface. The ADIS16003 is capable of

measuring acceleration with a full-scale range of ±1.7 g

(minimum). It can also measure both dynamic acceleration

(vibration) and static acceleration (gravity).

SELF-TEST

The ST pin controls the self-test feature. When this pin is set to

ometer. The resulting movement of the beam allows the user to

test if the accelerometer is functional. The typical change in

This pin may be left open-circuit or connected to common in

normal use. The ST pin should never be exposed to voltage

condition cannot be guaranteed (for example, multiple supply

is recommended.

SERIAL INTERFACE

The serial interface on the ADIS16003 consists of five wires, CS,

TCS, SCLK, DIN, and DOUT, with the temperature sensor’s

serial interface in parallel with the accelerometer’s serial

interface. The CS and TCS are used to select the accelerometer

or temperature sensor outputs, respectively. CS and TCS cannot

be active at the same time.

The SCLK input accesses data from the internal data registers.

CS

CS

puts the bus back into three-state. If

remains low, the next digital conversion is initiated. The details

for the control register bit functions are shown in Table 6.

Accelerometer Control Register

MSB

LSB

DONTC

ZERO

ZERO

ZERO

ADD0

ONE

ZERO

PM0

Table 6. Accelerometer Control Register Bit Functions

Bit

Mnemonic

Comments

7

DONTC

Don’t care. Can be one or zero.

ZERO

These bits should be held low.

6, 5,

4

3

ADD0

This address bit selects the x-axis or y-axis

outputs. Zero selects the x-axis; one selects

the y-axis.

2

ONE

This bit should be held high.

1

ZERO

This bit should be held low.

0

PM0

This bit selects the operation mode for the

accelerometer; set to zero for normal

operation and one for power down mode.

Power Down

By setting PM0 to one when updating the accelerometer control

register, the ADIS16003 goes into a shutdown mode. The

information stored in the control register is maintained during

shutdown. The ADIS16003 changes modes as soon as the

control register is updated. If the part is in shutdown mode and

PM0 is changed to zero, then the part powers up on the

sixteenth SCLK rising edge.

ADD0

By setting ADD0 to zero when updating the accelerometer

control register, the x-axis output is selected. By setting ADD0

to one, the y-axis output is selected.

ZERO

ZERO is defined as the logic low level.

ONE

ONE is defined as the logic high level.

DONTC

DONTC is defined as don’t care; can be a low or high logic level.