HIP6014

FN4420 Rev.2.00

Page 5 of 12

March 2000

BOOT (Pin 15)

This pin provides bias voltage to the upper MOSFET driver. A

bootstrap circuit may be used to create a BOOT voltage

suitable to drive a standard N-Channel MOSFET.

PGND (Pin 16)

This is the power ground connection. Tie the lower MOSFET

source to this pin.

LGATE (Pin 17)

Connect LGATE to the lower MOSFET gate. This pin provides

the gate drive for the lower MOSFET.

VCC (Pin 18)

Provide a 12V bias supply for the chip to this pin.

OVP (Pin 19)

The OVP pin can be used to drive an external SCR in the

event of an overvoltage condition. Output rising 15% more than

the DAC-set voltage triggers a high output on this pin and

disables PWM gate drive circuitry.

RT (Pin 20)

This pin provides oscillator switching frequency adjustment. By

placing a resistor (RT) from this pin to GND, the nominal

200kHz switching frequency is increased according to the

following equation:

Conversely, connecting a pull-up resistor (RT) from this pin to

VCC reduces the switching frequency according to the

following equation:

Functional Description

Initialization

The HIP6014 automatically initializes upon receipt of power.

Special sequencing of the input supplies is not necessary. The

Power-On Reset (POR) function continually monitors the input

supply voltages. The POR monitors the bias voltage at the

VCC pin and the input voltage (VIN) on the OCSET pin. The

level on OCSET is equal to VIN less a fixed voltage drop (see

over-current protection). The POR function initiates soft start

operation after both input supply voltages exceed their POR

thresholds. For operation with a single +12V power source, VIN

and VCC are equivalent and the +12V power source must

exceed the rising VCC threshold before POR initiates

operation.

Soft Start

The POR function initiates the soft start sequence. An internal

10

A current source charges an external capacitor (CSS) on the

SS pin to 4V. Soft start clamps the error amplifier output (COMP

pin) and reference input (+ terminal of error amp) to the SS pin

voltage. Figure 3 shows the soft start interval with CSS =0.1F.

Initially the clamp on the error amplifier (COMP pin) controls the

converter’s output voltage. At t1 in Figure 3, the SS voltage

reaches the valley of the oscillator’s triangle wave. The oscillator’s

triangular waveform is compared to the ramping error amplifier

voltage. This generates PHASE pulses of increasing width that

charge the output capacitor(s). This interval of increasing pulse

width continues to t2. With sufficient output voltage, the clamp on

the reference input controls the output voltage. This is the interval

between t2 and t3 in Figure 3. At t3 the SS voltage exceeds the

DACOUT voltage and the output voltage is in regulation. This

method provides a rapid and controlled output voltage rise. The

PGOOD signal toggles ‘high’ when the output voltage (VSEN pin)

is within

5% of DACOUT. The 2% hysteresis built into the power

good comparators prevents PGOOD oscillation due to nominal

output voltage ripple.

Over-Current Protection

The over-current function protects the converter from a shorted

output by using the upper MOSFET’s on-resistance, rDS(ON) to

monitor the current. This method enhances the converter’s

efficiency and reduces cost by eliminating a current sensing

resistor.

The over-current function cycles the soft-start function in a hiccup

mode to provide fault protection. A resistor (ROCSET) programs

the over-current trip level. An internal 200

A current sink develops

a voltage across ROCSET that is referenced to VIN. When the

voltage across the upper MOSFET (also referenced to VIN)

exceeds the voltage across ROCSET, the over-current function

initiates a soft-start sequence. The soft-start function discharges

CSS with a 10A current sink and inhibits PWM operation. The

soft-start function recharges CSS, and PWM operation resumes

with the error amplifier clamped to the SS voltage. Should an

overload occur while recharging CSS, the soft start function

inhibits PWM operation while fully charging CSS to 4V to complete

its cycle. Figure 4 shows this operation with an overload condition.

Note that the inductor current increases to over 15A during the

Fs 200kHz

510

6



RT k



---------------------

+



(RT to GND)

Fs 200kHz

410

7



RT k



---------------------

–



(RT to 12V)

0V

0V

0V

TIME (5ms/DIV.)

SOFT-START

(1V/DIV.)

OUTPUT

(1V/DIV.)

VOLTAGE

t2

t3

PGOOD

(2V/DIV.)

t1

FIGURE 3. SOFT START INTERVAL