8 Detailed Description

8.1 Overview

The SN74HCS573 contains eight D-type latches. All inputs include Schmitt-trigger architecture. All channels

share a latch enable (LE) and output enable (OE) input.

When the latch is enabled (LE is high), data is allowed to pass through from the D inputs to the Q outputs.

When the latch is disabled (LE is low), the Q outputs hold the last state they had regardless of changes at the D

inputs.

If the latch enable (LE) input is held low during startup, the output state of all channels is unknown until the latch

enable (LE) input is driven high with valid input signals at all data (D) inputs.

When the outputs are enabled (OE is low), the outputs are actively driving low or high.

When the outputs are disabled (OE is high), the outputs are set into the high-impedance state.

The active low output enable (OE) does not have any impact on the stored state in the latches.

8.2 Functional Block Diagram

D

LE

Q

xD

xQ

One of Eight D-Type Latches

OE

Shared Control Logic

LE

8.3 Feature Description

8.3.1 Balanced CMOS 3-State Outputs

This device includes balanced CMOS 3-State outputs. The three states that these outputs can be in are driving

high, driving low, and high impedance. The term "balanced" indicates that the device can sink and source similar

currents. The drive capability of this device may create fast edges into light loads so routing and load conditions

should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger

currents than the device can sustain without being damaged. It is important for the output power of the device

to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the Absolute

Maximum Ratings must be followed at all times.

When placed into the high-impedance mode, the output will neither source nor sink current, with the exception of

minor leakage current as defined in the Electrical Characteristics table. In the high-impedance state, the output

voltage is not controlled by the device and is dependent on external factors. If no other drivers are connected

to the node, then this is known as a floating node and the voltage is unknown. A pull-up or pull-down resistor

can be connected to the output to provide a known voltage at the output while it is in the high-impedance state.

The value of the resistor will depend on multiple factors, including parasitic capacitance and power consumption

limitations. Typically, a 10 kΩ resistor can be used to meet these requirements.

Unused 3-state CMOS outputs should be left disconnected.

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SN74HCS573

SCLS876A – OCTOBER 2021 – REVISED DECEMBER 2022

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Product Folder Links: SN74HCS573