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MAX22663 Datasheet(PDF) 2 Page - Analog Devices |
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MAX22663 Datasheet(HTML) 2 Page - Analog Devices |
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2 / 28 page ![]() MAX22663–MAX22666 Reinforced, Fast, Low-Power, Six-Channel Digital Isolators www.analog.com Analog Devices | 2 Absolute Maximum Ratings VDDA to GNDA.....................................................-0.3V to +6V VDDB to GNDB.....................................................-0.3V to +6V IN_ on Side A to GNDA ........................................-0.3V to +6V IN_ on Side B to GNDB ........................................-0.3V to +6V OUT_ on Side A to GNDA ................... -0.3V to (VDDA + 0.3V) OUT_ on Side B to GNDB ................... -0.3V to (VDDB + 0.3V) Short-Circuit Continuous Current __OUT_ on Side A to GNDA ........................................ ±30mA __OUT_ on Side B to GNDB.........................................±30mA Continuous Power Dissipation (TA = +70°C) __Wide SOIC (derate 14.95mW/°C above +70°C) 1195.81mW Temperature Ratings __Operating Temperature Range .................. -40°C to +125°C __Maximum Junction Temperature.............................. +150°C __Storage Temperature Range ..................... -60°C to +150°C __Lead Temperature (soldering, 10s) .......................... +300°C __Soldering Temperature (reflow)................................ +260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information PACKAGE TYPE: 16 WIDE SOIC Package Code W16MS+13 Outline Number 21-0042 Land Pattern Number 90-0107 THERMAL RESISTANCE, FOUR LAYER BOARD: Junction-to-Ambient (θJA) 66.90°C/W Junction-to-Case Thermal Resistance (θJC) 42.50°C/W Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to http://www.maximintegrated.com/thermal-tutorial. For the latest package outline information and land patterns (footprints), go to http://www.maximintegrated.com/packages. Note that a “+”, “#”, or “-“ in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. |
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