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MAX25263AFOC/VY Datasheet(PDF) 13 Page - Analog Devices |
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MAX25263AFOC/VY Datasheet(HTML) 13 Page - Analog Devices |
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13 / 20 page ![]() MAX25262/MAX25263 Automotive, 65V 2A/3A Mini Buck Converter www.analog.com Analog Devices | 13 The internal spread spectrum is disabled if the devices are synchronized to an external clock. However, the devices do not filter the input clock on the SYNC pin and pass any modulation (including spread spectrum) present on the driving external clock. SYNC Mode Selection To enable the skip mode, drive the SYNC low. In skip mode, the high-side FET turns for a fixed adaptable on-time (depending on VOUT, VSUP, and FSW). The high-side FET then turns off and the low-side FET turns on until the inductor current falls to zero cross threshold. Once the low-side FET turns off by hitting the zero-crossing threshold, LX becomes high impedance, and the output voltage keeps decreasing. When the output voltage or FB voltage is detected below the set point, the new cycle starts by turning on the high-side FET again. In this way, the regulator switches only as needed to service load to improve system efficiency. To enable the forced PWM (FPWM) mode, drive the SYNC high. The FPWM mode prevents the regulator from entering skip mode by disabling the zero-cross detection of the inductor current. The benefit of the FPWM mode is to keep the switching frequency constant under all load conditions. However, the FPWM operation diverts a considerable amount of the output current to PGND, reducing the efficiency under light-load conditions. The FPWM mode is useful to improve the load-transient response and eliminate unknown frequency harmonics that can interfere with AM radio bands. Over Current Protection The MAX25262/MAX25263 have a cycle-by-cycle current limit and include a hiccup mode to prevent any damage from overcurrent or short-circuit on the power channel. When the inductor current continuously hits the current limit at over current, the output voltage starts decreasing. If the IC detects the output voltage drops below 70% of the programmed regulation value, it turns off that channel. After waiting for about 10ms of hiccup time, the IC restarts that channel in case overcurrent or short-circuit condition is removed. Soft-Start When the IC is enabled, the soft-start circuitry gradually ramps up the reference voltage during soft-start time to reduce the input surge current during startup. Before the soft-start can be enabled, the BIAS voltage must exceed its UVLO threshold (3.1V typ). For the parts using an external divider or fixed internal output parts that have an output voltage higher or equal to 5V, the 2.1Mhz parts have a 2.75ms ramp time, and the 400kHz parts have a 3.6ms ramp time. For fixed output parts that have an output voltage lower than 5V, the soft-start ramp time can be calculated as follows: ������������������−������������������������ = ������������������������ 5 × 2.75 ������������������ 2.1������ℎ������ ������������������−������������������������ = ������������������������ 5 × 3.6 ������������������ 400������ℎ������ Internal Gate Driver Supply The gate drive for internal MOSFETs is driven by the internal BIAS voltage. In case the EXTVCC is not supplied externally with a power supply in the given range, the IC uses an internal LDO at 5V for the MOSFET gate drive. In case of an appropriate voltage on the EXTVCC, the internal LDO is turned OFF and the gate drive voltage is equal to the voltage at the EXTVCC. The MOSFET RdsON and gate capacitance charge depend heavily on the gate drive voltage. Thus, the efficiency and thermal performance of the IC depend on the voltage provided on the EXTVCC. An external +5V supply on the EXTVCC is recommended as that saves power dissipation in the internal LDO and enhances the MOSFETs for low RdsON. |
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