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PL-6313 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part # PL-6313
Description  Single-Chip GPS Baseband Processor
PDF  2 Pages
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PL-6313 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

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PL-6313 Product Brochure
V1.0 05/06/05
Prolific Technology Inc.
7F, #48, Sec.3, Nan-Kang Rd., Taipei, Taiwan 115, ROC
Tel: 886-2-2654-6363
Fax: 886-2-2654-6161
E-mail: sales@prolific.com.tw
http://www.prolific.com.tw
OVERVIEW
The PL-6313 is a low-power single-chip baseband LSI for GPS application. It supports 12 parallel correlation
channels, having 4000 time/frequency search bins, achieves fast signal lock-on to all visible satellite signals
at power-up and reacquisition. The sensitivity-enhanced architecture allows positioning in severe
environments such as under foliage and urban canyons. The PL-6313 incorporates power management
features to lower power consumption. Unused portion of the circuitry is turned-off dynamically. Software
commands allow controlling of PL-6313’s low-power features according to application requirements.
The PL-6313 works with available RF front-ends such as SiGe SE4100L and NEC uPB1007K. A complete
GPS receiver system can be formed using just two chips and a few discrete passive components. The
PL-6313 enables realization of low-power GPS receiver solution within a very small footprint. Having a small
package dimension and low power consumption, the PL-6313 is ideal for use in all applications requiring
GPS-enabled location awareness.
FEATURES
Low power consumption < 50mW
5-stage pipeline 32bit RISC CPU
On-chip program and data memory
12 parallel GPS signal processing channels
Fast acquisition with 4000 time/frequency search bins
WAAS / EGNOS SBAS correction
Wireless A-GPS support
Hot-start time-to-first-fix < 5sec
Cold-start time-to-first-fix < 45sec
PL-6313
Single-Chip GPS Baseband Processor
Acquisition sensitivity better than –140dBm
Tracking sensitivity better than –150dBm
Compatible with available GPS RF front-ends
UART / SPI / GPIO interface
On-chip real-time clock
Core voltage 1.8V, I/O voltage 3.3V
0.18um CMOS technology
0.8mm pitch 10mm x 10mm TFBGA128 package
Operating temperature from –40
oC to +85oC
BLOCK DIAGRAM


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