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ICS1894-33 Datasheet(PDF) 21 Page - Renesas Technology Corp |
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ICS1894-33 Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 39 page  ICS1894-33 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 21 ICS1894-33 REV A 021612 17.11 Auto-Negotiation Progress Monitor Bit 0 Reference Decode Table Reference Decode Table RO LM X 00 17.10 100Base-TX signal lost Valid signal Signal lost RO LH 0 17.9 100BasePLL Lock Error PLL locked PLL failed to lock RO LH 0 17.8 False Carrier detect Normal Carrier or Idle False Carrier RO LH 0 17.7 Invalid symbol detected Valid symbols observed Invalid symbol received RO LH 0 0 17.6 Halt Symbol detected No Halt Symbol received Halt Symbol received RO LH 0 17.5 Premature End detected Normal data stream Stream contained two IDLE symbols RO LH 0 17.4 Auto-Negotiation complete Auto-Negotiation in process Auto-Negotiation complete RO – 0 17.3 100Base-TX signal detect Signal present No signal present RO – 1 8 17.2 Jabber detect No jabber detected Jabber detected RO LH 0 17.1 Remote fault No remote fault detected Remote fault detected RO LH 0 17.0 Link Status Link is not valid Link is valid RO LL 0 Register 18 - 10Base-T Operations Register 18.15 Remote Jabber Detect No Remote Jabber Condition detected Remote Jabber Condition Detected RO LH 0 – 18.14 Polarity reversed Normal polarity Polarity reversed RO LH 0 18.13 Data Bus Mode [1x]=RMII mode [01]=Not supported [00]=Not supported R0 – – 18.12 R0 – L 18.11 AMDIXEN AMDIX disable AMDIX enable RW – L – 18.10 RXTRI RX output enable RX tri-state for RMII interface RW – L 18.9 REGEN Vender reserved register access enable Vender reserved register (byte25~byte31) access disable RW – L 18.8 TM_SWITCH Switch TMUX2 to TMUX1, test control RW – 0 18.7 ICS reserved Reserved Reserved RW/0 – – – 18.6 ICS reserved Reserved Reserved RW/0 – – 18.5 Jabber inhibit Normal Jabber behavior Jabber Check disabled RW – 0 18.4 ICS reserved Reserved Reserved RW/1 – 1 18.3 Auto polarity inhibit Polarity automatically corrected Polarity not automatically corrected RW – 0 0 18.2 SQE test inhibit Normal SQE test behavior SQE test disabled RW – 0 18.1 Link Loss inhibit Normal Link Loss behavior Link Always = Link Pass RW – 0 18.0 Squelch inhibit Normal squelch behavior No squelch RW – 0 Bit Definition When Bit = 0 When Bit = 1 Access 2 SF2 Default3 Hex |
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