
AL260
©2002,2003-Copyright by AverLogic Technologies, Corp.
Version B1.0
49
34
DRAM Input Horizontal Stride (R/W) [DRAMINHSTRIDE]
DRAMINHStride
<7:0>
Input DRAM horizontal stride (Unit: 4 pixels)
35
DRAM Input Horizontal Size (R/W) [DRAMINHSIZE]
DRAMINHSize
<7:0>
Input DRAM horizontal size (Unit: 4 pixels)
Note: Set stride value at 64/128/256 boundary, will better ease DRAM timing.
DRAMINHSIZE = CAPHDESTSIZE(CAP#25&24) / 4
III. DRAM window copy control
39
Window Copy Source Start LSB (R/W) [WCSRCSTART]
GSInputStart1
<7:0>
Bits<7:0> of GS input DRAM address start. (Unit: 8192 pixels)
3A
Window Copy Source Start (R/W) [WCSRCSTART]
GSInputStart2
<7:0>
Bits<15:8> of GS input DRAM address start
3B
Window Copy Source Start MSB (R/W) [WCSRCSTART]
GSInputStart3
<3:0>
Bits<18:16> of GS input DRAM address start
Reserved
<7:4>
Reserved
3C
Window Copy Source Stride (R/W) [GSDRAMINPUTSTRIDE]
GSIStride
<7:0>
GS input DRAM stride. (8 pixels)
3D
Window Copy Size (R/W) [GSDRAMINPUTSIZE]
GSHSize
<7:0>
GS input DRAM size. (Unit: 8 pixels)
3E
Direct Write Stride (R/W) [WCSTRIDE]
WCStride
<7:0>
DRAM window copy stride. (Unit: 8 pixels)
3F
Window Copy Destination Start LSB (R/W) [WCDESTSTART]
WCSrcStart1
<7:0>
Bits<7:0> of DRAM window copy source address start. (Unit: 8
pixels)