Integrated

Circuit

Systems, Inc.

ICS950219

Preliminary Product Preview

0640D—12/30/03

Pin Configuration

Recommended Application:

CK-408 clock for Intel® 845 chipset with P4 processor.

Output Features:

•

3 - Pairs of differential CPU clocks (differential current mode)

•

4 - 3V66 @ 3.3V

•

10 - PCI @ 3.3V

•

1 - 48MHz @ 3.3V

•

24-48 MHz selectable output @ 3.3V

•

2 - REF @ 3.3V, 14.318MHz

Features/Benefits:

•

Programmable output frequency.

•

Programmable output divider ratios.

•

Programmable output rise/fall time.

•

Programmable output skew.

•

Programmable spread percentage for EMI control.

•

Watchdog timer technology to reset system

if system malfunctions.

•

Programmable watch dog safe frequency.

•

Support I

2C Index read/write and block read/write operations.

•

Uses external 14.318MHz crystal.

Key Specifications:

•

CPU Output Jitter <150ps

•

3V66 Output Jitter <250ps

•

CPU Output Skew <100ps

Programmable Timing Control Hub™ for P4™

* Internal Pull-up resistor of 120K to VDD

48-Pin 300-mil SSOP

Frequency Table

2

t

i

B7

t

i

B6

t

i

B5

t

i

B4

t

i

B

K

L

C

U

P

C

z

H

M

6

6

V

3

z

H

M

K

L

C

I

C

P

z

H

M

4

S

F3

S

F2

S

F1

S

F0

S

F

00

0

0

0

0

0

.

2

0

10

0

.

8

60

0

.

4

3

00

0

0

1

0

0

.

5

0

10

0

.

0

70

0

.

5

3

00

0

1

0

0

0

.

8

0

10

0

.

2

70

0

.

6

3

00

0

1

1

0

0

.

1

1

10

0

.

4

70

0

.

7

3

00

1

0

0

0

0

.

4

1

10

0

.

6

70

0

.

8

3

00

1

0

1

0

0

.

7

1

10

0

.

8

70

0

.

9

3

00

1

1

0

0

0

.

0

2

10

0

.

0

80

0

.

0

4

00

1

1

1

0

0

.

3

2

10

0

.

2

80

0

.

1

4

01

0

0

0

0

0

.

6

2

10

0

.

2

70

0

.

6

3

01

0

0

1

0

0

.

0

3

10

3

.

4

70

1

.

7

3

01

0

1

0

0

0

.

6

3

10

0

.

8

60

0

.

4

3

01

0

1

1

0

0

.

0

4

10

0

.

0

70

0

.

5

3

01

1

0

0

0

0

.

4

4

10

0

.

2

70

0

.

6

3

01

1

0

1

0

0

.

8

4

10

0

.

4

70

0

.

7

3

01

1

1

0

0

0

.

2

5

10

0

.

6

70

0

.

8

3

01

1

1

1

0

0

.

6

5

10

0

.

8

70

0

.

9

3

10

0

0

0

0

0

.

0

6

10

0

.

0

80

0

.

0

4

10

0

0

1

0

0

.

4

6

10

0

.

2

80

0

.

1

4

10

0

1

0

6

6

.

6

6

16

6

.

6

63

3

.

3

3

10

0

1

1

0

0

.

0

7

10

0

.

8

60

0

.

4

3

10

1

0

0

0

0

.

5

7

10

0

.

0

70

0

.

5

3

10

1

0

1

0

0

.

0

8

10

0

.

2

70

0

.

6

3

10

1

1

0

0

0

.

5

8

10

0

.

4

70

0

.

7

3

10

1

1

1

0

0

.

0

9

10

0

.

6

70

0

.

8

3

11

0

0

0

0

8

.

6

60

8

.

6

60

4

.

3

3

11

0

0

1

0

2

.

0

0

10

8

.

6

60

4

.

3

3

11

0

1

0

0

6

.

3

3

10

8

.

6

60

4

.

3

3

11

0

1

1

0

4

.

0

0

20

8

.

6

60

4

.

3

3

11

1

0

0

6

6

.

6

66

6

.

6

63

3

.

3

3

11

1

0

1

0

0

.

0

0

16

6

.

6

63

3

.

3

3

11

1

1

0

0

0

.

0

0

26

6

.

6

63

3

.

3

3

11

1

1

1

3

3

.

3

3

16

6

.

6

63

3

.

3

3

*MULTISEL1/REF1

VDDREF

X1

X2

GND

*FS2/PCICLK0

*FS3/PCICLK1

PCICLK2

VDDPCI

*FS4/PCICLK3

PCICLK4

PCICLK5

GND

PCICLK6

PCICLK7

PCICLK8

PCICLK9

VDDPCI

Vtt_PWRGD#

RESET#

GND

*FS0/48MHz

*FS1/24_48MHz

AVDD48

REF0/MULTSEL0*

GND

VDDCPU

CPUCLKT2

CPUCLKC2

GND

PD#

CPUCLKT0

CPUCLKC0

VDDCPU

CPUCLKT1

CPUCLKC1

GND

I REF

AVDD

GND

VDD3V66

3V66_0

3V66_1

GND

3V66_2

3V66_3

SCLK

SDATA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change

without notice.