ICS951413 datasheet(13/25 Pages) RENESAS

13 / 25 page

Integrated

Circuit

Systems, Inc.

ICS951413

0929D—10/30/06

SMBus Table: CPU Spread Spectrum Control Register

Pin #

Name

Control Function

Type

PWD

Bit 7

Reserved

Bit 6

SSP14

Bit 5

SSP13

Bit 4

SSP12

Bit 3

SSP11

Bit 2

SSP10

Bit 1

SSP9

Bit 0

SSP8

SMBus Table: SRC Frequency Control Register

Pin #

Name

Control Function

Type

PWD

Bit 7

N Div8

N Divider Prog bit 8

Bit 6

N Div9

N Divider Prog bit 9

Bit 5

M Div5

Bit 4

M Div4

Bit 3

M Div3

Bit 2

M Div2

Bit 1

M Div1

Bit 0

M Div0

SMBus Table: SRC Frequency Control Register

Pin #

Name

Control Function

Type

PWD

Bit 7

N Div7

Bit 6

N Div6

Bit 5

N Div5

Bit 4

N Div4

Bit 3

N Div3

Bit 2

N Div2

Bit 1

N Div1

Bit 0

N Div0

SMBus Table: SRC Spread Spectrum Control Register

Pin #

Name

Control Function

Type

PWD

Bit 7

SSP7

Bit 6

SSP6

Bit 5

SSP5

Bit 4

SSP4

Bit 3

SSP3

Bit 2

SSP2

Bit 1

SSP1

Bit 0

SSP0

Byte 17

Spread Spectrum

Programming b(7:0)

Byte 16

N Divider Programming

b(7:0)

The decimal

representation of M and

N Divier in Byte 15 and

16 will configure the

SRC VCO frequency.

Default at power up =

latch-in or Byte 0 Rom

table. VCO Frequency =

14.318 x [NDiv(9:0)+8] /

[MDiv(5:0)+2]

M Divider Programming

bits

Byte 15

Byte 14

Spread Spectrum

Programming bit(14:8)

These Spread Spectrum

bits in Byte 13 and 14

will program the spread

pecentage of CPU

The decimal

representation of M and

N Divier in Byte 15 and

16 will configure the

SRC VCO frequency.

Default at power up =

latch-in or Byte 0 Rom

table. VCO Frequency =

14.318 x [NDiv(9:0)+8] /

[MDiv(5:0)+2]

These Spread Spectrum

bits in Byte 17 and 18

will program the spread

pecentage of SRC

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