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S30MS-P Datasheet(PDF) 25 Page - SPANSION

Part # S30MS-P
Description  1Gb/512Mb, x8/x16, 1.8 Volt NAND Interface Memory Based on MirrorBit??Technology
PDF  41 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION

S30MS-P Datasheet(HTML) 25 Page - SPANSION

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August 4, 2006 S30MS-P_00_A7
S30MS-P ORNANDTM Flash Family
23
Da ta
Shee t
(Prelim i nar y )
10. Schematic Cell Layout and Address Assignment
The Program operation works on page units while the Erase operation works on block units.
10.1
Array Organization
Figure 10.1 Array Organization
A page consists of 2112 Bytes in which 2048 Bytes are used for main memory storage and 64 Bytes are for
redundancy or for other uses.
1 page = 2112 Bytes
1 block = 2112 Bytes x 64 pages = (128K + 4K) Bytes
1Gb density = 2112 Bytes x 64 pages x 1024 blocks
Table 10.1 shows a summary of the addressing for the memory array components.
An address is read through the I/O port over four consecutive clock cycles, as shown in Table 10.2 and
Table 10.3. The Notes for Table 10.2 and Table 10.3 are listed below Table 10.3.
Table 10.1 Memory Addressing Key
Density
Bus
Width
Row Address
Column Address
Blocks
Block
Addres
s
Page
Address
in Block
Main/Spare Area
Main
Page
Segment
Main
Colum
n
Addres
s
Spare
Page
Segment
Spare
Colum
n
Addres
s
1Gb
x8
A27:A18
A17:A12
A11 (0=Main, 1=Spare)
A10:A9
A8:A0
A5:A4
A3:A0
1024
1Gb
x16
A26:A17
A16:A11
A10 (0=Main, 1=Spare)
A9:A8
A7:A0
A4:A3
A2:A0
1024
512 Mb
x8
A26:A18
A17:A12
A11 (0=Main, 1=Spare)
A10:A9
A8:A0
A5:A4
A3:A0
512
512 Mb
x16
A25:A17
A16:A11
A10 (0=Main, 1=Spare)
A9:A8
A7:A0
A4:A3
A2:A0
512
Table 10.2 (1Gb) x 8 device
1Gbit
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
1st Cycle
A0
A1
A2
A3
A4
A5
A6
A7
2nd Cycle
A8
A9
A10
A11
L
(Note 1)
L
(Note 1)
L
(Note 1)
L
(Note 1)
3rd Cycle
A12
A13
A14
A15
A16
A17
A18
A19
4th Cycle
A20
A21
A22
A23
A24
A25
A26
A27
64
8 I/O for x8
16I/O for x16
64 pages = 1 block
I/O7
I/O0
2048
2112 Bytes
1Gb device
64K pages
1024 blocks
512Mb device
32K pages
512 blocks



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