6.4 Thermal Information

THERMAL METRIC(1)

TPSM8291x

UNIT

RDU 30-pin QFN

JEDEC 51-7 PCB

TPSM8291xEVM-213

RθJA

Junction-to-ambient thermal resistance

31.3

30.2

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

22.4

n/a (2)

°C/W

RθJB

Junction-to-board thermal resistance

7.2

n/a (2)

°C/W

ΨJT

Junction-to-top characterization parameter

-4.9 (3)

-3.0 (3)

°C/W

YJB

Junction-to-board characterization parameter

7.1

9.0

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2)

Not applicable to an EVM

(3)

This is a negative value because the case temperature is higher than the die junction temperature due to the integrated inductor

having the highest power dissipation in the module.

6.5 Electrical Characteristics

Over recommended input voltage range, TJ = -40 ℃ to 125 ℃, (TJ = -55 ℃ to 125 ℃ for -ET parts). Typical values are at Vin

= 12 V andTJ = 25 ℃ (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

IQ

Quiescent current

EN = High, no load, device switching, fsw

= 1 MHz

5

mA

ISD

Shutdown current

EN = GND

0.3

70

µA

VUVLO

Under voltage lockout

VIN rising

2.85

2.92

3.0

V

VUVLO

Under voltage lockout

VIN rising

3.04

V

VHYS

Under voltage lockout hysteresis

200

mV

TJSD

Thermal shutdown threshold

TJ rising

170

°C

Thermal shutdown hysteresis

TJ falling

20

°C

CONTROL and INTERFACE

VH_EN

High-level input-threshold voltage at EN/

SYNC

0.97

1.01

1.04

V

VL_EN

Low-level input-threshold voltage at EN/

SYNC

0.87

0.9

0.93

V

VH_SYNC

High-level input-threshold clock signal on

EN/SYNC

EN/SYNC = clock

1.1

V

VL_SYNC

Low-level input-threshold clock signal on

EN/SYNC

EN/SYNC = clock

0.4

V

IEN,LKG

Input leakage current into EN/SYNC

EN/SYNC = GND or VIN

5

160

nA

RPD

Pull-down resistor on EN/SYNC

EN/SYNC = Low

330

500

kΩ

tdelay

Enable delay time

Time from EN/SYNC high to device starts

switching, RS-CONF = 80.6 kΩ

1

ms

INR/SS

NR/SS source current

67.5

75

82.5

µA

RS-CONF S-CONF resistor step range accuracy

RS-CONF tolerance for all settings

according to Table 7-1

-4

+4

%

CS-CONF

Maximum capacitance connected to S-

CONF pin

30

pF

VPG

Power good threshold

VFB rising, referenced to VFB nominal

93

95

98

%

VPG

Power good threshold

VFB falling, referenced to VFB nominal

88

90

93

%

VPG,OL

Low-level output voltage at PG pin

ISINK = 1 mA

0.4

V

IPG,LKG

Input leakage current into PG pin

VPG = 5 V

5

500

nA

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TPSM82913, TPSM82913E

SLVSGJ4B – OCTOBER 2022 – REVISED MAY 2023

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