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ADL5317 Datasheet(PDF) 11 Page - Analog Devices |
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ADL5317 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() ADL5317 Rev. 0 | Page 11 of 16 APPLICATIONS The ADL5317 is primarily designed for wide dynamic range applications simplifying APD bias circuit architecture. Accurate control of the bias voltage across the APD becomes critical to maintain the proper avalanche multiplication factor as the temperature and input power vary. Figure 21 shows how to use the ADL5317 with an external temperature sensor to monitor the ambient temperature of the APD. Using a look-up table and DAC to drive VSET, it is possible to apply the correct VAPD for the conditions. Note that Pin 9, Pin 10, and Pin 12 to Pin 15 were removed for simplification. OVERCURRENT PROTECTION THERMAL PROTECTION COMM FALT VSET VPLV VPHV VCLH GARD VAPD IAPD IPDM CURRENT MIRROR 5:1 30 × V SET IAPD 5 R 29 × R LOGIC SUPPLY LOOK-UP TABLE AND DAC TEMPERATURE SENSOR 5V OPTICAL POWER TRANSLINEAR LOG AMP APD TIA RECEIVER 75V FROM DC–DC CONVERTER DATA CGRD Figure 21. Typical APD Biasing Application Using the ADL5317 In this application, the ADL5317 is operating in linear mode. The bias voltage to the APD, delivered at Pin VAPD, is controlled by the voltage (VSET) at Pin VSET. The bias voltage at VAPD is equal to 30 × VSET. The range of voltages available at VAPD for a given high voltage supply is limited to approximately 33 V (or less, for VAPD < 41 V). This is because the GARD and VAPD pins are clamped to within ~40 V below VPHV, preventing internal device breakdowns. The input current, IAPD, is divided down by a factor of 5 and precisely mirrored to Pin IPDM. This interface is optimized for use with any of the Analog Devices translinear logarithmic amplifiers (for example, the AD8304 or AD8305) to offer a precise, wide dynamic range measurement of the optical power incident upon the APD. If a voltage output is preferred at IPDM, a single external resistor to ground is all that is necessary to perform the conversion. Voltage compliance at IPDM is limited to VPLV or VAPD/3, whichever is lower. SUPPLY TRACKING MODE Some applications for the ADL5317 require a variable dc-to-dc converter or alternative variable biasing sources to supply VPHV. For these applications, it is necessary to configure the ADL5317 for supply tracking mode, shown in Figure 22. In this mode, the VSET interface is bypassed. However, the full functionality of the precision current mirror remains available. OVERCURRENT PROTECTION THERMAL PROTECTION FALT VSET VPLV VPHV VPHV VCLH GARD VAPD IPDM CURRENT MIRROR 5:1 30 × V SET R 29 × R 5V COMM 16 COMM 15 COMM 14 COMM 13 1 2 3 4 5 6 7 8 11 10 9 NC GARD VARIABLE DC SUPPLY 10V TO 77V TIA 8V TO 75V BIAS ACROSS APD DATA OUT LOG RSSI 3V TO 5.5V 4V TO 6V 12 13 NC Figure 22. Supply Tracking Mode In supply tracking mode, the VSET amplifier is pulled up beyond its linear operating range and effectively placed into a controlled saturation. This is done by applying 3.0 V to 5.5 V at the VSET pin. It is also necessary to remove the connection from VCLH, which defines the saturation point, to VPHV. Once the ADL5317 is placed into supply tracking mode, VAPD is clamped to 2.0 V below VPHV. For those designs where it is desirable to drive VSET from the VPLV supply, it is necessary to place a 100 kΩ resistor between VSET and VPLV for VPLV > 5.5 V. This is due to input current limitations on the VSET pin. TRANSLINEAR LOG AMP INTERFACING The monitor current output, IPDM, of the ADL5317 is designed to interface directly to an Analog Devices translinear logarithmic amplifier, such as the AD8304, AD8305, or ADL5306. Figure 23 shows the basic connections necessary for interfacing the ADL5317 to the AD8305. In this configuration, the designer is can use the full current mirror range of the ADL5317 for high accuracy power monitoring. |
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