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MC68340 Datasheet(PDF) 240 Page - Freescale Semiconductor, Inc

Part # MC68340
Description  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 Datasheet(HTML) 240 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
5- 103
The numbers inside parentheses (r/p/w) are included in the total clock cycle number. All
timing data assumes two-clock reads and writes.
Instruction
Head
Tail
Cycles
ADD(A)
Rn, Rm
0
0
2(0/1/0)
ADD(A)
〈FEA〉, Rn
0
0
2(0/1/0)
ADD
Dn,
〈FEA〉
0
3
5(0/1/x)
AND
Dn, Dm
0
0
2(0/1/0)
AND
〈FEA〉, Dn
0
0
2(0/1/0)
AND
Dn,
〈FEA〉
0
3
5(0/1/x)
EOR
Dn, Dm
0
0
2(0/1/0)
EOR
Dn,
〈FEA〉
0
3
5(0/1/x)
OR
Dn, Dm
0
0
2(0/1/0)
OR
〈FEA〉, Dn
0
0
2(0/1/0)
OR
Dn,
〈FEA〉
0
3
5(0/1/x)
SUB(A)
Rn, Rm
0
0
2(0/1/0)
SUB(A)
〈FEA〉, Rn
0
0
2(0/1/0)
SUB
Dn,
〈FEA〉
0
3
5(0/1/x)
CMP(A)
Rn, Rm
0
0
2(0/1/0)
CMP(A)
〈FEA〉, Rn
0
0
2(0/1/0)
CMP2 (Save) *
〈FEA〉, Rn
1
1
3(0/1/0)
CMP2 (Op)
〈FEA〉, Rn
2
0
16-18(X/1/0)
MUL(su).W
〈FEA〉, Dn
0
0
26(0/1/0)
MUL(su).L (Save) *
〈FEA〉, Dn
1
1
3(0/1/0)
MUL(su).L (Op)
〈FEA〉, Dl
2
0
46-52(0/1/0)
MUL(su).L (Op)
〈FEA〉, Dn:Dl
2
0
46(0/1/0)
DIVU.W
〈FEA〉, Dn
0
0
32(0/1/0)
DIVS.W
〈FEA〉, Dn
0
0
42(0/1/0)
DIVU.L (Save)*
〈FEA〉, Dn
1
1
3(0/1/0)
DIVU.L (Op)
〈FEA〉, Dn
2
0
<46(0/1/0)
DIVS.L (Save) *
〈FEA〉, Dn
1
1
3(0/1/0)
DIVS.L (Op)
〈FEA〉, Dn
2
0
<62(0/1/0)
TBL(su)
Dn:Dm, Dp
26
0
28-30(0/2/0)
TBL(su) (Save) *
〈CEA〉, Dn
1
1
3(0/1/0)
TBL(su) (Op)
〈CEA〉, Dn
6
0
33-35(2X/1/0)
TBLSN
Dn:Dm, Dp
30
0
30-34(0/2/0)
TBLSN (Save)*
〈CEA〉, Dn
1
1
3(0/1/0)
TBLSN (Op)
〈CEA〉, Dn
6
0
35-39(2X/1/0)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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