MC68340 datasheet(244/441 Pages) FREESCALE

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MOTOROLA

MC68340 USER’S MANUAL

5- 107

5.7.3.8 SINGLE OPERAND INSTRUCTIONS. The single operand instruction table

indicates the number of clock periods needed for the processor to perform the specified

operation using the specified addressing mode. The total number of clock cycles is

outside the parentheses. The numbers inside parentheses (r/p/w) are included in the total

clock cycle number. All timing data assumes two-clock reads and writes.

Instruction

Head

Tail

Cycles

CLR

2(0/1/0)

CLR

〈CEA〉

4(0/1/x)

NEG

2(0/1/0)

NEG

〈FEA〉

5(0/1/x)

NEGX

2(0/1/0)

NEGX

〈FEA〉

5(0/1/x)

NOT

2(0/1/0)

NOT

〈FEA〉

5(0/1/x)

EXT

2(0/1/0)

NBCD

4(0/1/0)

NBCD

〈FEA〉

6(0/1/1)

Scc

4(0/1/0)

Scc

〈CEA〉

6(0/1/1)

TAS

6(0/1/0)

TAS

〈CEA〉

10(0/1/1)

TST

〈FEA〉

2(0/1/0)

= There is one bus cycle for byte and word operands and two bus cycles for long-word

operands. For long-word bus cycles, add two clocks to the tail and to the number of

cycles.

Freescale Semiconductor, Inc.

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