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MC68340 Datasheet(PDF) 284 Page - Freescale Semiconductor, Inc |
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MC68340 Datasheet(HTML) 284 Page - Freescale Semiconductor, Inc |
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284 / 441 page  6- 34 MC68340 USER’S MANUAL MOTOROLA DAR1, DAR2 $790, $7B0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 RESET: UUUUUUUUUUUUUUUU 15 14 13 12 11 10 9876543210 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RESET: UUUUUUUUUUUUUUUU U = Unaffected by reset Supervisor/User During the DMA write cycle, this register drives the address on the address bus. This register can be programmed to increment (CCR DAPI bit set) or remain constant (CCR DAPI bit cleared) after each operand transfer. The register is incremented using unsigned arithmetic and will roll over if overflow occurs. For example, if a register contains $FFFFFFFF and is incremented by 1, it will roll over to $00000000. This register can be incremented by 1, 2, or 4, depending on the size of the operand and the starting address. If the operand size is byte, the register is always incremented by 1. If the operand size is word and the starting address is even-word aligned, the register is incremented by 2. If the operand size is long word and the address is even-word aligned, the register is incremented by 4. The DAR value must be aligned to an even-word boundary if the transfer size is word or long word; otherwise, the CSR CONF bit is set, and the transfer does not occur. When read, this register always contains the next destination address. If a bus error terminates the transfer, this register contains the next destination address that would have been run had the error not occurred. 6.7.8 Byte Transfer Counter Register (BTC) The BTC is a 32-bit register that contains the number of bytes left to transfer in a given block. This register is accessible in either supervisor or user space. The BTC can always be read or written to when the DMA module is enabled (i.e., the STP bit in the MCR is cleared). BTC1, BTC2 $794, $7B4 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 RESET: UUUUUUUUUUUUUUUU 15 14 13 12 11 10 9876543210 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RESET: UUUUUUUUUUUUUUUU U = Unaffected by reset Supervisor/User Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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