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MC68340 Datasheet(PDF) 314 Page - Freescale Semiconductor, Inc |
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MC68340 Datasheet(HTML) 314 Page - Freescale Semiconductor, Inc |
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314 / 441 page ![]() MOTOROLA MC68340 USER’S MANUAL 7- 19 Address FC Register Read (R/W = 1) Register Write (R/W = 0) 700 S1 MCR (HIGH BYTE) MCR (HIGH BYTE) 701 S MCR (LOW BYTE) MCR (LOW BYTE) 702 S DO NOT ACCESS3 DO NOT ACCESS3 703 S DO NOT ACCESS3 DO NOT ACCESS3 704 S INTERRUPT LEVEL (ILR) NTERRUPT LEVEL (ILR) 705 S INTERRUPT VECTOR (IVR) INTERRUPT VECTOR (IVR) 710 S/U2 MODE REGISTER 1A (MR1A) MODE REGISTER 1A (MR1A) 711 S/U STATUS REGISTER A (SRA) CLOCK-SELECT REGISTER A (CSRA) 712 S/U DO NOT ACCESS3 COMMAND REGISTER A (CRA) 713 S/U RECEIVER BUFFER A (RBA) TRANSMITTER BUFFER A (TBA) 714 S/U INPUT PORT CHANGE REGISTER (IPCR) AUXILIARY CONTROL REGISTER (ACR) 715 S/U INTERRUPT STATUS REGISTER (ISR) INTERRUPT ENABLE REGISTER (IER) 716 S/U DO NOT ACCESS3 DO NOT ACCESS3 717 S/U DO NOT ACCESS3 DO NOT ACCESS3 718 S/U MODE REGISTER 1B (MR1B) MODE REGISTER 1B (MR1B) 719 S/U STATUS REGISTER B (SRB) CLOCK-SELECT REGISTER B (CSRB) 71A S/U DO NOT ACCESS3 COMMAND REGISTER B (CRB) 71B S/U RECEIVER BUFFER B (RBB) TRANSMITTER BUFFER B (TBB) 71C S/U DO NOT ACCESS3 DO NOT ACCESS3 71D S/U INPUT PORT REGISTER (IP) OUTPUT PORT CONTROL REGISTER (OPCR) 71E S/U DO NOT ACCESS3 OUTPUT PORT (OP)4 BIT SET 71F S/U DO NOT ACCESS3 OUTPUT PORT (OP)4 BIT RESET 720 S/U MODE REGISTER 2A (MR2A) MODE REGISTER 2A (MR2A) 721 S/U MODE REGISTER 2B (MR2B) MODE REGISTER 2B (MR2B) NOTES: 1. S = Register permanently defined as supervisor-only access 2. S/U = Register programmable as either supervisor or user access 3. A read or write to these locations currently has no effect. 4. Address-triggered commands Figure 7-9. Serial Module Programming Model 7.4.1.1 MODULE CONFIGURATION REGISTER (MCR). The MCR controls the serial module configuration. This register can be either read or written when the module is enabled and is in the supervisor state. The MCR is not affected by a CPU32 RESET instruction. Only the MCR can be accessed when the module is disabled (i.e., the STP bit in the MCR is set). MCR $700 15 14 13 12 11 10 9876543210 STP FRZ1 FRZ0 ICCS 0 000 SUPV 000 IARB RESET: 0 000000010000000 Read/Write Supervisor Only Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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